376 lines
8.3 KiB
C
376 lines
8.3 KiB
C
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/*
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* linux/arch/unicore32/kernel/irq.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/signal.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/random.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/kallsyms.h>
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#include <linux/proc_fs.h>
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#include <linux/syscore_ops.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include "setup.h"
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/*
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* PKUnity GPIO edge detection for IRQs:
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* IRQs are generated on Falling-Edge, Rising-Edge, or both.
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* Use this instead of directly setting GRER/GFER.
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*/
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static int GPIO_IRQ_rising_edge;
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static int GPIO_IRQ_falling_edge;
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static int GPIO_IRQ_mask = 0;
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#define GPIO_MASK(irq) (1 << (irq - IRQ_GPIO0))
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static int puv3_gpio_type(struct irq_data *d, unsigned int type)
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{
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unsigned int mask;
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if (d->irq < IRQ_GPIOHIGH)
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mask = 1 << d->irq;
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else
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mask = GPIO_MASK(d->irq);
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if (type == IRQ_TYPE_PROBE) {
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if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
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return 0;
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type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
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}
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if (type & IRQ_TYPE_EDGE_RISING)
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GPIO_IRQ_rising_edge |= mask;
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else
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GPIO_IRQ_rising_edge &= ~mask;
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if (type & IRQ_TYPE_EDGE_FALLING)
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GPIO_IRQ_falling_edge |= mask;
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else
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GPIO_IRQ_falling_edge &= ~mask;
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writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
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writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
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return 0;
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}
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/*
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* GPIO IRQs must be acknowledged. This is for IRQs from 0 to 7.
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*/
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static void puv3_low_gpio_ack(struct irq_data *d)
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{
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writel((1 << d->irq), GPIO_GEDR);
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}
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static void puv3_low_gpio_mask(struct irq_data *d)
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{
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writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR);
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}
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static void puv3_low_gpio_unmask(struct irq_data *d)
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{
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writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR);
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}
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static int puv3_low_gpio_wake(struct irq_data *d, unsigned int on)
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{
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if (on)
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writel(readl(PM_PWER) | (1 << d->irq), PM_PWER);
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else
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writel(readl(PM_PWER) & ~(1 << d->irq), PM_PWER);
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return 0;
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}
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static struct irq_chip puv3_low_gpio_chip = {
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.name = "GPIO-low",
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.irq_ack = puv3_low_gpio_ack,
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.irq_mask = puv3_low_gpio_mask,
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.irq_unmask = puv3_low_gpio_unmask,
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.irq_set_type = puv3_gpio_type,
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.irq_set_wake = puv3_low_gpio_wake,
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};
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/*
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* IRQ8 (GPIO0 through 27) handler. We enter here with the
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* irq_controller_lock held, and IRQs disabled. Decode the IRQ
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* and call the handler.
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*/
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static void puv3_gpio_handler(struct irq_desc *desc)
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{
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unsigned int mask, irq;
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mask = readl(GPIO_GEDR);
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do {
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/*
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* clear down all currently active IRQ sources.
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* We will be processing them all.
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*/
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writel(mask, GPIO_GEDR);
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irq = IRQ_GPIO0;
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do {
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if (mask & 1)
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generic_handle_irq(irq);
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mask >>= 1;
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irq++;
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} while (mask);
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mask = readl(GPIO_GEDR);
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} while (mask);
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}
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/*
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* GPIO0-27 edge IRQs need to be handled specially.
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* In addition, the IRQs are all collected up into one bit in the
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* interrupt controller registers.
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*/
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static void puv3_high_gpio_ack(struct irq_data *d)
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{
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unsigned int mask = GPIO_MASK(d->irq);
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writel(mask, GPIO_GEDR);
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}
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static void puv3_high_gpio_mask(struct irq_data *d)
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{
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unsigned int mask = GPIO_MASK(d->irq);
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GPIO_IRQ_mask &= ~mask;
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writel(readl(GPIO_GRER) & ~mask, GPIO_GRER);
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writel(readl(GPIO_GFER) & ~mask, GPIO_GFER);
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}
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static void puv3_high_gpio_unmask(struct irq_data *d)
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{
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unsigned int mask = GPIO_MASK(d->irq);
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GPIO_IRQ_mask |= mask;
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writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
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writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
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}
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static int puv3_high_gpio_wake(struct irq_data *d, unsigned int on)
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{
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if (on)
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writel(readl(PM_PWER) | PM_PWER_GPIOHIGH, PM_PWER);
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else
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writel(readl(PM_PWER) & ~PM_PWER_GPIOHIGH, PM_PWER);
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return 0;
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}
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static struct irq_chip puv3_high_gpio_chip = {
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.name = "GPIO-high",
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.irq_ack = puv3_high_gpio_ack,
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.irq_mask = puv3_high_gpio_mask,
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.irq_unmask = puv3_high_gpio_unmask,
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.irq_set_type = puv3_gpio_type,
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.irq_set_wake = puv3_high_gpio_wake,
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};
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/*
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* We don't need to ACK IRQs on the PKUnity unless they're GPIOs
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* this is for internal IRQs i.e. from 8 to 31.
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*/
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static void puv3_mask_irq(struct irq_data *d)
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{
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writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR);
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}
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static void puv3_unmask_irq(struct irq_data *d)
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{
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writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR);
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}
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/*
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* Apart form GPIOs, only the RTC alarm can be a wakeup event.
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*/
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static int puv3_set_wake(struct irq_data *d, unsigned int on)
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{
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if (d->irq == IRQ_RTCAlarm) {
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if (on)
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writel(readl(PM_PWER) | PM_PWER_RTC, PM_PWER);
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else
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writel(readl(PM_PWER) & ~PM_PWER_RTC, PM_PWER);
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return 0;
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}
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return -EINVAL;
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}
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static struct irq_chip puv3_normal_chip = {
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.name = "PKUnity-v3",
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.irq_ack = puv3_mask_irq,
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.irq_mask = puv3_mask_irq,
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.irq_unmask = puv3_unmask_irq,
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.irq_set_wake = puv3_set_wake,
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};
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static struct resource irq_resource = {
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.name = "irqs",
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.start = io_v2p(PKUNITY_INTC_BASE),
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.end = io_v2p(PKUNITY_INTC_BASE) + 0xFFFFF,
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};
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static struct puv3_irq_state {
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unsigned int saved;
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unsigned int icmr;
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unsigned int iclr;
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unsigned int iccr;
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} puv3_irq_state;
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static int puv3_irq_suspend(void)
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{
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struct puv3_irq_state *st = &puv3_irq_state;
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st->saved = 1;
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st->icmr = readl(INTC_ICMR);
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st->iclr = readl(INTC_ICLR);
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st->iccr = readl(INTC_ICCR);
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/*
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* Disable all GPIO-based interrupts.
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*/
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writel(readl(INTC_ICMR) & ~(0x1ff), INTC_ICMR);
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/*
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* Set the appropriate edges for wakeup.
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*/
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writel(readl(PM_PWER) & GPIO_IRQ_rising_edge, GPIO_GRER);
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writel(readl(PM_PWER) & GPIO_IRQ_falling_edge, GPIO_GFER);
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/*
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* Clear any pending GPIO interrupts.
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*/
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writel(readl(GPIO_GEDR), GPIO_GEDR);
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return 0;
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}
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static void puv3_irq_resume(void)
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{
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struct puv3_irq_state *st = &puv3_irq_state;
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if (st->saved) {
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writel(st->iccr, INTC_ICCR);
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writel(st->iclr, INTC_ICLR);
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writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER);
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writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER);
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writel(st->icmr, INTC_ICMR);
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}
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}
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static struct syscore_ops puv3_irq_syscore_ops = {
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.suspend = puv3_irq_suspend,
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.resume = puv3_irq_resume,
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};
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static int __init puv3_irq_init_syscore(void)
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{
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register_syscore_ops(&puv3_irq_syscore_ops);
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return 0;
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}
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device_initcall(puv3_irq_init_syscore);
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void __init init_IRQ(void)
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{
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unsigned int irq;
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request_resource(&iomem_resource, &irq_resource);
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/* disable all IRQs */
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writel(0, INTC_ICMR);
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/* all IRQs are IRQ, not REAL */
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writel(0, INTC_ICLR);
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/* clear all GPIO edge detects */
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writel(FMASK(8, 0) & ~FIELD(1, 1, GPI_SOFF_REQ), GPIO_GPIR);
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writel(0, GPIO_GFER);
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writel(0, GPIO_GRER);
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writel(0x0FFFFFFF, GPIO_GEDR);
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writel(1, INTC_ICCR);
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for (irq = 0; irq < IRQ_GPIOHIGH; irq++) {
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irq_set_chip(irq, &puv3_low_gpio_chip);
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irq_set_handler(irq, handle_edge_irq);
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irq_modify_status(irq,
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IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN,
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0);
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}
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for (irq = IRQ_GPIOHIGH + 1; irq < IRQ_GPIO0; irq++) {
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irq_set_chip(irq, &puv3_normal_chip);
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irq_set_handler(irq, handle_level_irq);
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irq_modify_status(irq,
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IRQ_NOREQUEST | IRQ_NOAUTOEN,
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IRQ_NOPROBE);
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}
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for (irq = IRQ_GPIO0; irq <= IRQ_GPIO27; irq++) {
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irq_set_chip(irq, &puv3_high_gpio_chip);
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irq_set_handler(irq, handle_edge_irq);
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irq_modify_status(irq,
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IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN,
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0);
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}
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/*
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* Install handler for GPIO 0-27 edge detect interrupts
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*/
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irq_set_chip(IRQ_GPIOHIGH, &puv3_normal_chip);
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irq_set_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler);
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#ifdef CONFIG_PUV3_GPIO
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puv3_init_gpio();
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#endif
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}
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/*
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* do_IRQ handles all hardware IRQ's. Decoded IRQs should not
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* come via this function. Instead, they should provide their
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* own 'handler'
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*/
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asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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/*
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* Some hardware gives randomly wrong interrupts. Rather
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* than crashing, do something sensible.
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*/
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if (unlikely(irq >= nr_irqs)) {
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if (printk_ratelimit())
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printk(KERN_WARNING "Bad IRQ%u\n", irq);
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ack_bad_irq(irq);
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} else {
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generic_handle_irq(irq);
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}
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||
|
|
|
||
|
|
irq_exit();
|
||
|
|
set_irq_regs(old_regs);
|
||
|
|
}
|
||
|
|
|