572 lines
14 KiB
C
572 lines
14 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/soc/mediatek/mtk-pm-qos.h>
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#include <linux/sched.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/of.h>
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#include <spm/mtk_spm.h>
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#if defined(CONFIG_MTK_QOS_V2)
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#include <mtk_qos_ipi.h>
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#endif
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#include <helio-dvfsrc-qos.h>
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struct helio_dvfsrc *dvfsrc;
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#define DVFSRC_REG(offset) (dvfsrc->regs + offset)
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#if defined(DVFSRC_SMC_CONTROL)
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#define SPM_REG(offset) (dvfsrc->spm_regs + offset)
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u32 spm_reg_read(u32 offset)
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{
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if (is_dvfsrc_enabled())
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return readl(SPM_REG(offset));
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else
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return 0;
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}
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#endif
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u32 dvfsrc_read(u32 offset)
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{
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if (is_dvfsrc_enabled())
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return readl(DVFSRC_REG(offset));
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else
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return 0;
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}
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void dvfsrc_write(u32 offset, u32 val)
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{
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if (is_dvfsrc_enabled())
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writel(val, DVFSRC_REG(offset));
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}
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static void dvfsrc_restore(void)
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{
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int i, class_type;
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for (i = DVFSRC_QOS_MEMORY_BANDWIDTH; i < DVFSRC_QOS_NUM_CLASSES; i++) {
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switch (i) {
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case DVFSRC_QOS_MEMORY_BANDWIDTH:
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class_type = MTK_PM_QOS_MEMORY_BANDWIDTH_TEST;
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break;
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case DVFSRC_QOS_CPU_MEMORY_BANDWIDTH:
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class_type = MTK_PM_QOS_CPU_MEMORY_BANDWIDTH;
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break;
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case DVFSRC_QOS_GPU_MEMORY_BANDWIDTH:
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class_type = MTK_PM_QOS_GPU_MEMORY_BANDWIDTH;
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break;
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case DVFSRC_QOS_MM_MEMORY_BANDWIDTH:
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class_type = PM_QOS_MM_MEMORY_BANDWIDTH;
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break;
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case DVFSRC_QOS_OTHER_MEMORY_BANDWIDTH:
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class_type = MTK_PM_QOS_OTHER_MEMORY_BANDWIDTH;
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break;
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case DVFSRC_QOS_DDR_OPP:
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class_type = MTK_PM_QOS_DDR_OPP;
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break;
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case DVFSRC_QOS_VCORE_OPP:
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class_type = MTK_PM_QOS_VCORE_OPP;
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break;
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case DVFSRC_QOS_SCP_VCORE_REQUEST:
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class_type = MTK_PM_QOS_SCP_VCORE_REQUEST;
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break;
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case DVFSRC_QOS_POWER_MODEL_DDR_REQUEST:
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class_type = MTK_PM_QOS_POWER_MODEL_DDR_REQUEST;
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break;
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case DVFSRC_QOS_POWER_MODEL_VCORE_REQUEST:
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class_type = MTK_PM_QOS_POWER_MODEL_VCORE_REQUEST;
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break;
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case DVFSRC_QOS_VCORE_DVFS_FORCE_OPP:
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class_type = MTK_PM_QOS_VCORE_DVFS_FORCE_OPP;
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break;
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case DVFSRC_QOS_ISP_HRT_BANDWIDTH:
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class_type = PM_QOS_ISP_HRT_BANDWIDTH;
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break;
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case DVFSRC_QOS_APU_MEMORY_BANDWIDTH:
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class_type = PM_QOS_APU_MEMORY_BANDWIDTH;
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break;
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default:
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continue;
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}
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commit_data(i, mtk_pm_qos_request(class_type), 0);
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}
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dvfsrc->qos_enabled = 1;
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}
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#ifdef CONFIG_MTK_TINYSYS_SSPM_SUPPORT
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#if defined(CONFIG_MTK_QOS_V2)
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static void helio_dvfsrc_sspm_init(int dvfsrc_en)
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{
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struct qos_ipi_data qos_d;
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qos_d.cmd = QOS_IPI_DVFSRC_ENABLE;
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qos_d.u.dvfsrc_enable.dvfsrc_en = dvfsrc_en;
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qos_ipi_to_sspm_command(&qos_d, 2);
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}
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#endif
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#endif
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void helio_dvfsrc_enable(int dvfsrc_en)
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{
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int ret = 0;
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if (dvfsrc_en > 1 || dvfsrc_en < 0)
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return;
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if (dvfsrc->dvfsrc_enabled == dvfsrc_en && dvfsrc_en == 1) {
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pr_info("DVFSRC already enabled\n");
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return;
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}
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#ifdef CONFIG_MTK_TINYSYS_SSPM_SUPPORT
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#if defined(CONFIG_MTK_QOS_V2)
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helio_dvfsrc_sspm_init(dvfsrc_en);
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#endif
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#endif
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dvfsrc->dvfsrc_enabled = dvfsrc_en;
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dvfsrc->opp_forced = 0;
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ret = sprintf(dvfsrc->force_start, "0");
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if (ret < 0)
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pr_info("sprintf fail\n");
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ret = sprintf(dvfsrc->force_end, "0");
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if (ret < 0)
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pr_info("sprintf fail\n");
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dvfsrc_restore();
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if (dvfsrc_en)
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dvfsrc_en |= (dvfsrc->dvfsrc_flag << 1);
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mtk_spmfw_init(dvfsrc_en, 1);
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}
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void helio_dvfsrc_flag_set(int flag)
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{
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dvfsrc->dvfsrc_flag = flag;
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}
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int helio_dvfsrc_flag_get(void)
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{
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return dvfsrc->dvfsrc_flag;
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}
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static int helio_dvfsrc_common_init(void)
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{
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dvfsrc_opp_level_mapping();
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dvfsrc_opp_table_init();
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return 0;
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}
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int is_dvfsrc_enabled(void)
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{
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if (dvfsrc)
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return dvfsrc->dvfsrc_enabled == 1;
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return 0;
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}
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int is_dvfsrc_qos_enabled(void)
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{
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if (dvfsrc)
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return dvfsrc->qos_enabled == 1;
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return 0;
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}
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static void get_mtk_pm_qos_info(char *p)
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{
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p += sprintf(p, "%-24s: %d\n",
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"MTK_PM_QOS_MEMORY_BW",
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mtk_pm_qos_request(MTK_PM_QOS_MEMORY_BANDWIDTH_TEST));
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p += sprintf(p, "%-24s: %d\n",
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"MTK_PM_QOS_CPU_MEMORY_BW",
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mtk_pm_qos_request(MTK_PM_QOS_CPU_MEMORY_BANDWIDTH));
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p += sprintf(p, "%-24s: %d\n",
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"MTK_PM_QOS_GPU_MEMORY_BW",
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mtk_pm_qos_request(MTK_PM_QOS_GPU_MEMORY_BANDWIDTH));
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p += sprintf(p, "%-24s: %d\n",
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"MTK_PM_QOS_MM_MEMORY_BW",
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mtk_pm_qos_request(PM_QOS_MM_MEMORY_BANDWIDTH));
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p += sprintf(p, "%-24s: %d\n",
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"MTK_PM_QOS_OTHER_MEMORY_BW",
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mtk_pm_qos_request(MTK_PM_QOS_OTHER_MEMORY_BANDWIDTH));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_DDR_OPP",
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mtk_pm_qos_request(MTK_PM_QOS_DDR_OPP));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_VCORE_OPP",
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mtk_pm_qos_request(MTK_PM_QOS_VCORE_OPP));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_SCP_VCORE_REQ",
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mtk_pm_qos_request(MTK_PM_QOS_SCP_VCORE_REQUEST));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_PM_DDR_REQ",
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mtk_pm_qos_request(MTK_PM_QOS_POWER_MODEL_DDR_REQUEST));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_PM_VCORE_REQ",
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mtk_pm_qos_request(MTK_PM_QOS_POWER_MODEL_VCORE_REQUEST));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_FORCE_OPP",
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mtk_pm_qos_request(MTK_PM_QOS_VCORE_DVFS_FORCE_OPP));
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p += sprintf(p, "%-24s: 0x%x\n",
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"MTK_PM_QOS_ISP_HRT",
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mtk_pm_qos_request(MTK_PM_QOS_ISP_HRT_BANDWIDTH));
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}
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u32 dvfsrc_dump_reg(char *ptr, u32 count)
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{
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char buf[1024];
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u32 index = 0;
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memset(buf, '\0', sizeof(buf));
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get_opp_info(buf);
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if (ptr) {
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index += scnprintf(&ptr[index], (count - index - 1),
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"%s\n", buf);
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} else
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pr_info("%s\n", buf);
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memset(buf, '\0', sizeof(buf));
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get_dvfsrc_reg(buf);
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if (ptr) {
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index += scnprintf(&ptr[index], (count - index - 1),
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"%s\n", buf);
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} else
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pr_info("%s\n", buf);
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memset(buf, '\0', sizeof(buf));
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get_dvfsrc_record(buf);
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if (ptr) {
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index += scnprintf(&ptr[index], (count - index - 1),
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"%s\n", buf);
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} else
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pr_info("%s\n", buf);
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memset(buf, '\0', sizeof(buf));
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get_spm_reg(buf);
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if (ptr) {
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index += scnprintf(&ptr[index], (count - index - 1),
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"%s\n", buf);
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} else
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pr_info("%s\n", buf);
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memset(buf, '\0', sizeof(buf));
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get_mtk_pm_qos_info(buf);
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if (ptr) {
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index += scnprintf(&ptr[index], (count - index - 1),
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"%s\n", buf);
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} else
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pr_info("%s\n", buf);
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return index;
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}
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void dvfsrc_set_power_model_ddr_request(unsigned int level)
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{
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commit_data(DVFSRC_QOS_POWER_MODEL_DDR_REQUEST, level, 1);
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}
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static int mtk_pm_qos_memory_bw_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_MEMORY_BANDWIDTH, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_cpu_memory_bw_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_CPU_MEMORY_BANDWIDTH, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_gpu_memory_bw_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_GPU_MEMORY_BANDWIDTH, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_mm_memory_bw_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_MM_MEMORY_BANDWIDTH, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_other_memory_bw_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_OTHER_MEMORY_BANDWIDTH, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_ddr_opp_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_DDR_OPP, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_vcore_opp_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_VCORE_OPP, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_scp_vcore_request_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_SCP_VCORE_REQUEST, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_power_model_ddr_request_notify(struct notifier_block *b,
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unsigned long l, void *v)
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{
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commit_data(DVFSRC_QOS_POWER_MODEL_DDR_REQUEST, l, 1);
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return NOTIFY_OK;
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}
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static int mtk_pm_qos_power_model_vcore_request_notify(struct notifier_block *b,
|
||
|
|
unsigned long l, void *v)
|
||
|
|
{
|
||
|
|
commit_data(DVFSRC_QOS_POWER_MODEL_VCORE_REQUEST, l, 1);
|
||
|
|
|
||
|
|
return NOTIFY_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int mtk_pm_qos_vcore_dvfs_force_opp_notify(struct notifier_block *b,
|
||
|
|
unsigned long l, void *v)
|
||
|
|
{
|
||
|
|
commit_data(DVFSRC_QOS_VCORE_DVFS_FORCE_OPP, l, 1);
|
||
|
|
|
||
|
|
return NOTIFY_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int pmqos_isp_hrt_memory_bw_notify(struct notifier_block *b,
|
||
|
|
unsigned long l, void *v)
|
||
|
|
{
|
||
|
|
commit_data(DVFSRC_QOS_ISP_HRT_BANDWIDTH, l, 1);
|
||
|
|
|
||
|
|
return NOTIFY_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int mtk_pm_qos_apu_memory_bw_notify(struct notifier_block *b,
|
||
|
|
unsigned long l, void *v)
|
||
|
|
{
|
||
|
|
commit_data(DVFSRC_QOS_APU_MEMORY_BANDWIDTH, l, 1);
|
||
|
|
|
||
|
|
return NOTIFY_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void mtk_pm_qos_notifier_register(void)
|
||
|
|
{
|
||
|
|
dvfsrc->mtk_pm_qos_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_cpu_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_cpu_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_gpu_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_gpu_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_mm_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_mm_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_other_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_other_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_ddr_opp_nb.notifier_call =
|
||
|
|
mtk_pm_qos_ddr_opp_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_vcore_opp_nb.notifier_call =
|
||
|
|
mtk_pm_qos_vcore_opp_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_scp_vcore_request_nb.notifier_call =
|
||
|
|
mtk_pm_qos_scp_vcore_request_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_power_model_ddr_request_nb.notifier_call =
|
||
|
|
mtk_pm_qos_power_model_ddr_request_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_power_model_vcore_request_nb.notifier_call =
|
||
|
|
mtk_pm_qos_power_model_vcore_request_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_vcore_dvfs_force_opp_nb.notifier_call =
|
||
|
|
mtk_pm_qos_vcore_dvfs_force_opp_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_isp_hrt_bw_nb.notifier_call =
|
||
|
|
pmqos_isp_hrt_memory_bw_notify;
|
||
|
|
dvfsrc->mtk_pm_qos_apu_memory_bw_nb.notifier_call =
|
||
|
|
mtk_pm_qos_apu_memory_bw_notify;
|
||
|
|
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_MEMORY_BANDWIDTH_TEST,
|
||
|
|
&dvfsrc->mtk_pm_qos_memory_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_CPU_MEMORY_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_cpu_memory_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_GPU_MEMORY_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_gpu_memory_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(PM_QOS_MM_MEMORY_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_mm_memory_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_OTHER_MEMORY_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_other_memory_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_DDR_OPP,
|
||
|
|
&dvfsrc->mtk_pm_qos_ddr_opp_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_VCORE_OPP,
|
||
|
|
&dvfsrc->mtk_pm_qos_vcore_opp_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_SCP_VCORE_REQUEST,
|
||
|
|
&dvfsrc->mtk_pm_qos_scp_vcore_request_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_POWER_MODEL_DDR_REQUEST,
|
||
|
|
&dvfsrc->mtk_pm_qos_power_model_ddr_request_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_POWER_MODEL_VCORE_REQUEST,
|
||
|
|
&dvfsrc->mtk_pm_qos_power_model_vcore_request_nb);
|
||
|
|
mtk_pm_qos_add_notifier(MTK_PM_QOS_VCORE_DVFS_FORCE_OPP,
|
||
|
|
&dvfsrc->mtk_pm_qos_vcore_dvfs_force_opp_nb);
|
||
|
|
mtk_pm_qos_add_notifier(PM_QOS_ISP_HRT_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_isp_hrt_bw_nb);
|
||
|
|
mtk_pm_qos_add_notifier(PM_QOS_APU_MEMORY_BANDWIDTH,
|
||
|
|
&dvfsrc->mtk_pm_qos_apu_memory_bw_nb);
|
||
|
|
}
|
||
|
|
|
||
|
|
__weak void mtk_pm_qos_trace_dbg_show_request(int mtk_pm_qos_class)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
static DEFINE_RATELIMIT_STATE(tracelimit, 5 * HZ, 1);
|
||
|
|
|
||
|
|
void vcorefs_trace_qos(void)
|
||
|
|
{
|
||
|
|
if (__ratelimit(&tracelimit)) {
|
||
|
|
mtk_pm_qos_trace_dbg_show_request(MTK_PM_QOS_DDR_OPP);
|
||
|
|
mtk_pm_qos_trace_dbg_show_request(MTK_PM_QOS_VCORE_OPP);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static int helio_dvfsrc_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
struct resource *res;
|
||
|
|
struct device_node *np = pdev->dev.of_node;
|
||
|
|
|
||
|
|
if (!spm_load_firmware_status()) {
|
||
|
|
pr_err("SPM FIRMWARE IS NOT READY\n");
|
||
|
|
return -ENODEV;
|
||
|
|
}
|
||
|
|
|
||
|
|
dvfsrc = devm_kzalloc(&pdev->dev, sizeof(*dvfsrc), GFP_KERNEL);
|
||
|
|
if (!dvfsrc)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||
|
|
|
||
|
|
dvfsrc->regs = devm_ioremap_resource(&pdev->dev, res);
|
||
|
|
if (IS_ERR(dvfsrc->regs))
|
||
|
|
return PTR_ERR(dvfsrc->regs);
|
||
|
|
|
||
|
|
platform_set_drvdata(pdev, dvfsrc);
|
||
|
|
dvfsrc->dev = &pdev->dev;
|
||
|
|
|
||
|
|
ret = helio_dvfsrc_add_interface(&pdev->dev);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
mtk_pm_qos_notifier_register();
|
||
|
|
|
||
|
|
helio_dvfsrc_common_init();
|
||
|
|
|
||
|
|
if (of_property_read_u32(np, "dvfsrc_flag",
|
||
|
|
(u32 *) &dvfsrc->dvfsrc_flag))
|
||
|
|
dvfsrc->dvfsrc_flag = 0;
|
||
|
|
|
||
|
|
helio_dvfsrc_platform_pre_init(dvfsrc);
|
||
|
|
helio_dvfsrc_config(dvfsrc);
|
||
|
|
|
||
|
|
pr_info("%s: init done\n", __func__);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int helio_dvfsrc_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
helio_dvfsrc_remove_interface(&pdev->dev);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id helio_dvfsrc_of_match[] = {
|
||
|
|
{ .compatible = "mediatek,dvfsrc" },
|
||
|
|
{ .compatible = "mediatek,mt6785-dvfsrc" },
|
||
|
|
{ },
|
||
|
|
};
|
||
|
|
|
||
|
|
MODULE_DEVICE_TABLE(of, helio_dvfsrc_of_match);
|
||
|
|
|
||
|
|
static __maybe_unused int helio_dvfsrc_suspend(struct device *dev)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
if (dvfsrc->suspend) {
|
||
|
|
ret = dvfsrc->suspend(dvfsrc);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static __maybe_unused int helio_dvfsrc_resume(struct device *dev)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
if (dvfsrc->resume) {
|
||
|
|
ret = dvfsrc->resume(dvfsrc);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static SIMPLE_DEV_PM_OPS(helio_dvfsrc_pm, helio_dvfsrc_suspend,
|
||
|
|
helio_dvfsrc_resume);
|
||
|
|
|
||
|
|
static struct platform_driver helio_dvfsrc_driver = {
|
||
|
|
.probe = helio_dvfsrc_probe,
|
||
|
|
.remove = helio_dvfsrc_remove,
|
||
|
|
.driver = {
|
||
|
|
.name = "helio-dvfsrc",
|
||
|
|
.pm = &helio_dvfsrc_pm,
|
||
|
|
.of_match_table = helio_dvfsrc_of_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static int __init helio_dvfsrc_init(void)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
ret = platform_driver_register(&helio_dvfsrc_driver);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
late_initcall_sync(helio_dvfsrc_init)
|
||
|
|
|
||
|
|
static void __exit helio_dvfsrc_exit(void)
|
||
|
|
{
|
||
|
|
platform_driver_unregister(&helio_dvfsrc_driver);
|
||
|
|
}
|
||
|
|
module_exit(helio_dvfsrc_exit)
|
||
|
|
|
||
|
|
MODULE_LICENSE("GPL v2");
|
||
|
|
MODULE_DESCRIPTION("Helio dvfsrc driver");
|