317 lines
8.3 KiB
C
317 lines
8.3 KiB
C
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/*
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* Copyright © 2006-2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/i2c.h>
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#include <drm/drmP.h>
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#include "intel_bios.h"
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#include "psb_drv.h"
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#include "psb_intel_drv.h"
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#include "psb_intel_reg.h"
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#include "power.h"
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#include "cdv_device.h"
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#include <linux/pm_runtime.h>
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static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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u32 temp, reg;
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reg = ADPA;
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temp = REG_READ(reg);
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temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
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temp &= ~ADPA_DAC_ENABLE;
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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temp |= ADPA_DAC_ENABLE;
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break;
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case DRM_MODE_DPMS_STANDBY:
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temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
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break;
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case DRM_MODE_DPMS_SUSPEND:
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temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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case DRM_MODE_DPMS_OFF:
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temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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}
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REG_WRITE(reg, temp);
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}
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static enum drm_mode_status cdv_intel_crt_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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/* The lowest clock for CDV is 20000KHz */
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if (mode->clock < 20000)
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return MODE_CLOCK_LOW;
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/* The max clock for CDV is 355 instead of 400 */
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if (mode->clock > 355000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_crtc *crtc = encoder->crtc;
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struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
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int dpll_md_reg;
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u32 adpa, dpll_md;
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u32 adpa_reg;
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if (gma_crtc->pipe == 0)
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dpll_md_reg = DPLL_A_MD;
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else
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dpll_md_reg = DPLL_B_MD;
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adpa_reg = ADPA;
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/*
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* Disable separate mode multiplier used when cloning SDVO to CRT
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* XXX this needs to be adjusted when we really are cloning
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*/
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{
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dpll_md = REG_READ(dpll_md_reg);
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REG_WRITE(dpll_md_reg,
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dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
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}
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adpa = 0;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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adpa |= ADPA_HSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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adpa |= ADPA_VSYNC_ACTIVE_HIGH;
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if (gma_crtc->pipe == 0)
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adpa |= ADPA_PIPE_A_SELECT;
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else
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adpa |= ADPA_PIPE_B_SELECT;
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REG_WRITE(adpa_reg, adpa);
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}
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/**
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* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
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*
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* \return true if CRT is connected.
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* \return false if CRT is disconnected.
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*/
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static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
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bool force)
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{
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struct drm_device *dev = connector->dev;
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u32 hotplug_en;
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int i, tries = 0, ret = false;
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u32 orig;
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/*
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* On a CDV thep, CRT detect sequence need to be done twice
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* to get a reliable result.
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*/
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tries = 2;
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orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
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hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
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hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
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hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
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hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
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for (i = 0; i < tries ; i++) {
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unsigned long timeout;
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/* turn on the FORCE_DETECT */
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REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
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timeout = jiffies + msecs_to_jiffies(1000);
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/* wait for FORCE_DETECT to go off */
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do {
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if (!(REG_READ(PORT_HOTPLUG_EN) &
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CRT_HOTPLUG_FORCE_DETECT))
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break;
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msleep(1);
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} while (time_after(timeout, jiffies));
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}
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if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
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CRT_HOTPLUG_MONITOR_NONE)
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ret = true;
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/* clear the interrupt we just generated, if any */
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REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
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/* and put the bits back */
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REG_WRITE(PORT_HOTPLUG_EN, orig);
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return ret;
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}
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static enum drm_connector_status cdv_intel_crt_detect(
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struct drm_connector *connector, bool force)
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{
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if (cdv_intel_crt_detect_hotplug(connector, force))
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return connector_status_connected;
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else
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return connector_status_disconnected;
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}
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static void cdv_intel_crt_destroy(struct drm_connector *connector)
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{
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struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
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psb_intel_i2c_destroy(gma_encoder->ddc_bus);
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drm_connector_unregister(connector);
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drm_connector_cleanup(connector);
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kfree(connector);
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}
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static int cdv_intel_crt_get_modes(struct drm_connector *connector)
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{
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struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
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return psb_intel_ddc_get_modes(connector,
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&gma_encoder->ddc_bus->adapter);
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}
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static int cdv_intel_crt_set_property(struct drm_connector *connector,
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struct drm_property *property,
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uint64_t value)
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{
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return 0;
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}
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/*
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* Routines for controlling stuff on the analog port
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*/
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static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
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.dpms = cdv_intel_crt_dpms,
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.prepare = gma_encoder_prepare,
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.commit = gma_encoder_commit,
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.mode_set = cdv_intel_crt_mode_set,
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};
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static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
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.dpms = drm_helper_connector_dpms,
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.detect = cdv_intel_crt_detect,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = cdv_intel_crt_destroy,
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.set_property = cdv_intel_crt_set_property,
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};
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static const struct drm_connector_helper_funcs
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cdv_intel_crt_connector_helper_funcs = {
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.mode_valid = cdv_intel_crt_mode_valid,
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.get_modes = cdv_intel_crt_get_modes,
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.best_encoder = gma_best_encoder,
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};
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static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
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{
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drm_encoder_cleanup(encoder);
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}
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static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
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.destroy = cdv_intel_crt_enc_destroy,
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};
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void cdv_intel_crt_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev)
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{
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struct gma_connector *gma_connector;
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struct gma_encoder *gma_encoder;
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struct drm_connector *connector;
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struct drm_encoder *encoder;
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u32 i2c_reg;
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gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
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if (!gma_encoder)
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return;
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gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
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if (!gma_connector)
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goto failed_connector;
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connector = &gma_connector->base;
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connector->polled = DRM_CONNECTOR_POLL_HPD;
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drm_connector_init(dev, connector,
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&cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
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encoder = &gma_encoder->base;
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drm_encoder_init(dev, encoder,
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&cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC, NULL);
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gma_connector_attach_encoder(gma_connector, gma_encoder);
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/* Set up the DDC bus. */
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i2c_reg = GPIOA;
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/* Remove the following code for CDV */
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/*
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if (dev_priv->crt_ddc_bus != 0)
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i2c_reg = dev_priv->crt_ddc_bus;
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}*/
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gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
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i2c_reg, "CRTDDC_A");
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if (!gma_encoder->ddc_bus) {
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dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
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"failed.\n");
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goto failed_ddc;
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}
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gma_encoder->type = INTEL_OUTPUT_ANALOG;
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/*
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psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
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psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
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*/
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connector->interlace_allowed = 0;
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connector->doublescan_allowed = 0;
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drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
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drm_connector_helper_add(connector,
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&cdv_intel_crt_connector_helper_funcs);
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drm_connector_register(connector);
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return;
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failed_ddc:
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drm_encoder_cleanup(&gma_encoder->base);
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drm_connector_cleanup(&gma_connector->base);
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kfree(gma_connector);
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failed_connector:
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kfree(gma_encoder);
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return;
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}
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