344 lines
8 KiB
C
344 lines
8 KiB
C
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/*
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* Clause 45 PHY support
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*/
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#include <linux/ethtool.h>
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#include <linux/export.h>
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#include <linux/mdio.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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/**
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* genphy_c45_setup_forced - configures a forced speed
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* @phydev: target phy_device struct
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*/
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int genphy_c45_pma_setup_forced(struct phy_device *phydev)
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{
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int ctrl1, ctrl2, ret;
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/* Half duplex is not supported */
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if (phydev->duplex != DUPLEX_FULL)
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return -EINVAL;
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ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
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if (ctrl1 < 0)
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return ctrl1;
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ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2);
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if (ctrl2 < 0)
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return ctrl2;
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ctrl1 &= ~MDIO_CTRL1_SPEEDSEL;
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/*
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* PMA/PMD type selection is 1.7.5:0 not 1.7.3:0. See 45.2.1.6.1
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* in 802.3-2012 and 802.3-2015.
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*/
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ctrl2 &= ~(MDIO_PMA_CTRL2_TYPE | 0x30);
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switch (phydev->speed) {
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case SPEED_10:
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ctrl2 |= MDIO_PMA_CTRL2_10BT;
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break;
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case SPEED_100:
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ctrl1 |= MDIO_PMA_CTRL1_SPEED100;
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ctrl2 |= MDIO_PMA_CTRL2_100BTX;
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break;
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case SPEED_1000:
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ctrl1 |= MDIO_PMA_CTRL1_SPEED1000;
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/* Assume 1000base-T */
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ctrl2 |= MDIO_PMA_CTRL2_1000BT;
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break;
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case SPEED_10000:
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ctrl1 |= MDIO_CTRL1_SPEED10G;
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/* Assume 10Gbase-T */
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ctrl2 |= MDIO_PMA_CTRL2_10GBT;
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break;
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default:
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return -EINVAL;
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}
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ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1);
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if (ret < 0)
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return ret;
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return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2);
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}
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EXPORT_SYMBOL_GPL(genphy_c45_pma_setup_forced);
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/**
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* genphy_c45_an_disable_aneg - disable auto-negotiation
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* @phydev: target phy_device struct
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*
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* Disable auto-negotiation in the Clause 45 PHY. The link parameters
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* parameters are controlled through the PMA/PMD MMD registers.
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*
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* Returns zero on success, negative errno code on failure.
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*/
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int genphy_c45_an_disable_aneg(struct phy_device *phydev)
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{
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int val;
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
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if (val < 0)
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return val;
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val &= ~(MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART);
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return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val);
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}
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EXPORT_SYMBOL_GPL(genphy_c45_an_disable_aneg);
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/**
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* genphy_c45_restart_aneg - Enable and restart auto-negotiation
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* @phydev: target phy_device struct
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*
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* This assumes that the auto-negotiation MMD is present.
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*
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* Enable and restart auto-negotiation.
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*/
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int genphy_c45_restart_aneg(struct phy_device *phydev)
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{
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int val;
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
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if (val < 0)
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return val;
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val |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART;
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return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val);
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}
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EXPORT_SYMBOL_GPL(genphy_c45_restart_aneg);
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/**
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* genphy_c45_aneg_done - return auto-negotiation complete status
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* @phydev: target phy_device struct
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*
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* This assumes that the auto-negotiation MMD is present.
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*
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* Reads the status register from the auto-negotiation MMD, returning:
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* - positive if auto-negotiation is complete
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* - negative errno code on error
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* - zero otherwise
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*/
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int genphy_c45_aneg_done(struct phy_device *phydev)
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{
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int val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
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return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0;
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}
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EXPORT_SYMBOL_GPL(genphy_c45_aneg_done);
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/**
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* genphy_c45_read_link - read the overall link status from the MMDs
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* @phydev: target phy_device struct
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* @mmd_mask: MMDs to read status from
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*
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* Read the link status from the specified MMDs, and if they all indicate
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* that the link is up, return positive. If an error is encountered,
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* a negative errno will be returned, otherwise zero.
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*/
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int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask)
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{
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int val, devad;
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bool link = true;
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while (mmd_mask) {
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devad = __ffs(mmd_mask);
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mmd_mask &= ~BIT(devad);
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/* The link state is latched low so that momentary link
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* drops can be detected. Do not double-read the status
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* in polling mode to detect such short link drops.
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*/
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if (!phy_polling_mode(phydev)) {
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val = phy_read_mmd(phydev, devad, MDIO_STAT1);
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if (val < 0)
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return val;
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}
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val = phy_read_mmd(phydev, devad, MDIO_STAT1);
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if (val < 0)
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return val;
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if (!(val & MDIO_STAT1_LSTATUS))
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link = false;
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}
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return link;
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}
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EXPORT_SYMBOL_GPL(genphy_c45_read_link);
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/**
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* genphy_c45_read_lpa - read the link partner advertisement and pause
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* @phydev: target phy_device struct
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*
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* Read the Clause 45 defined base (7.19) and 10G (7.33) status registers,
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* filling in the link partner advertisement, pause and asym_pause members
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* in @phydev. This assumes that the auto-negotiation MMD is present, and
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* the backplane bit (7.48.0) is clear. Clause 45 PHY drivers are expected
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* to fill in the remainder of the link partner advert from vendor registers.
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*/
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int genphy_c45_read_lpa(struct phy_device *phydev)
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{
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int val;
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/* Read the link partner's base page advertisement */
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA);
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if (val < 0)
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return val;
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phydev->lp_advertising = mii_lpa_to_ethtool_lpa_t(val);
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phydev->pause = val & LPA_PAUSE_CAP ? 1 : 0;
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phydev->asym_pause = val & LPA_PAUSE_ASYM ? 1 : 0;
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/* Read the link partner's 10G advertisement */
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);
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if (val < 0)
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return val;
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if (val & MDIO_AN_10GBT_STAT_LP10G)
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phydev->lp_advertising |= ADVERTISED_10000baseT_Full;
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return 0;
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}
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EXPORT_SYMBOL_GPL(genphy_c45_read_lpa);
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/**
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* genphy_c45_read_pma - read link speed etc from PMA
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* @phydev: target phy_device struct
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*/
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int genphy_c45_read_pma(struct phy_device *phydev)
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{
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int val;
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val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
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if (val < 0)
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return val;
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switch (val & MDIO_CTRL1_SPEEDSEL) {
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case 0:
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phydev->speed = SPEED_10;
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break;
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case MDIO_PMA_CTRL1_SPEED100:
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phydev->speed = SPEED_100;
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break;
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case MDIO_PMA_CTRL1_SPEED1000:
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phydev->speed = SPEED_1000;
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break;
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case MDIO_CTRL1_SPEED10G:
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phydev->speed = SPEED_10000;
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break;
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default:
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phydev->speed = SPEED_UNKNOWN;
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break;
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}
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phydev->duplex = DUPLEX_FULL;
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return 0;
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}
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EXPORT_SYMBOL_GPL(genphy_c45_read_pma);
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/**
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* genphy_c45_read_mdix - read mdix status from PMA
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* @phydev: target phy_device struct
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*/
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int genphy_c45_read_mdix(struct phy_device *phydev)
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{
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int val;
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if (phydev->speed == SPEED_10000) {
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val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
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MDIO_PMA_10GBT_SWAPPOL);
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if (val < 0)
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return val;
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switch (val) {
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case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
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phydev->mdix = ETH_TP_MDI;
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break;
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case 0:
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phydev->mdix = ETH_TP_MDI_X;
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break;
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default:
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phydev->mdix = ETH_TP_MDI_INVALID;
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break;
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}
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(genphy_c45_read_mdix);
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/* The gen10g_* functions are the old Clause 45 stub */
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int gen10g_config_aneg(struct phy_device *phydev)
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{
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_config_aneg);
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int gen10g_read_status(struct phy_device *phydev)
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{
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u32 mmd_mask = phydev->c45_ids.devices_in_package;
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int ret;
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/* For now just lie and say it's 10G all the time */
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phydev->speed = SPEED_10000;
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phydev->duplex = DUPLEX_FULL;
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/* Avoid reading the vendor MMDs */
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mmd_mask &= ~(BIT(MDIO_MMD_VEND1) | BIT(MDIO_MMD_VEND2));
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ret = genphy_c45_read_link(phydev, mmd_mask);
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phydev->link = ret > 0 ? 1 : 0;
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_read_status);
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int gen10g_no_soft_reset(struct phy_device *phydev)
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{
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/* Do nothing for now */
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_no_soft_reset);
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int gen10g_config_init(struct phy_device *phydev)
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{
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/* Temporarily just say we support everything */
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phydev->supported = SUPPORTED_10000baseT_Full;
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phydev->advertising = SUPPORTED_10000baseT_Full;
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_config_init);
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int gen10g_suspend(struct phy_device *phydev)
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{
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_suspend);
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int gen10g_resume(struct phy_device *phydev)
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{
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return 0;
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}
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EXPORT_SYMBOL_GPL(gen10g_resume);
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struct phy_driver genphy_10g_driver = {
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.phy_id = 0xffffffff,
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.phy_id_mask = 0xffffffff,
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.name = "Generic 10G PHY",
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.soft_reset = gen10g_no_soft_reset,
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.config_init = gen10g_config_init,
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.features = 0,
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.config_aneg = gen10g_config_aneg,
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.read_status = gen10g_read_status,
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.suspend = gen10g_suspend,
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.resume = gen10g_resume,
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};
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