451 lines
10 KiB
C
451 lines
10 KiB
C
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "mt76.h"
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static struct mt76_txwi_cache *
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mt76_alloc_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t;
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dma_addr_t addr;
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int size;
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size = (sizeof(*t) + L1_CACHE_BYTES - 1) & ~(L1_CACHE_BYTES - 1);
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t = devm_kzalloc(dev->dev, size, GFP_ATOMIC);
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if (!t)
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return NULL;
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addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi),
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DMA_TO_DEVICE);
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t->dma_addr = addr;
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return t;
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}
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static struct mt76_txwi_cache *
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__mt76_get_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t = NULL;
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spin_lock_bh(&dev->lock);
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if (!list_empty(&dev->txwi_cache)) {
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t = list_first_entry(&dev->txwi_cache, struct mt76_txwi_cache,
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list);
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list_del(&t->list);
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}
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spin_unlock_bh(&dev->lock);
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return t;
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}
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struct mt76_txwi_cache *
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mt76_get_txwi(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t = __mt76_get_txwi(dev);
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if (t)
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return t;
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return mt76_alloc_txwi(dev);
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}
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void
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mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t)
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{
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if (!t)
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return;
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spin_lock_bh(&dev->lock);
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list_add(&t->list, &dev->txwi_cache);
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spin_unlock_bh(&dev->lock);
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}
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void mt76_tx_free(struct mt76_dev *dev)
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{
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struct mt76_txwi_cache *t;
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while ((t = __mt76_get_txwi(dev)) != NULL)
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dma_unmap_single(dev->dev, t->dma_addr, sizeof(t->txwi),
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DMA_TO_DEVICE);
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}
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static int
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mt76_txq_get_qid(struct ieee80211_txq *txq)
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{
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if (!txq->sta)
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return MT_TXQ_BE;
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return txq->ac;
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}
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void
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mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
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struct mt76_wcid *wcid, struct sk_buff *skb)
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{
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct mt76_queue *q;
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int qid = skb_get_queue_mapping(skb);
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if (WARN_ON(qid >= MT_TXQ_PSD)) {
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qid = MT_TXQ_BE;
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skb_set_queue_mapping(skb, qid);
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}
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if (!wcid->tx_rate_set)
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ieee80211_get_tx_rates(info->control.vif, sta, skb,
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info->control.rates, 1);
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q = &dev->q_tx[qid];
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spin_lock_bh(&q->lock);
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dev->queue_ops->tx_queue_skb(dev, q, skb, wcid, sta);
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dev->queue_ops->kick(dev, q);
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if (q->queued > q->ndesc - 8)
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ieee80211_stop_queue(dev->hw, skb_get_queue_mapping(skb));
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spin_unlock_bh(&q->lock);
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}
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EXPORT_SYMBOL_GPL(mt76_tx);
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static struct sk_buff *
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mt76_txq_dequeue(struct mt76_dev *dev, struct mt76_txq *mtxq, bool ps)
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{
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struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
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struct sk_buff *skb;
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skb = skb_dequeue(&mtxq->retry_q);
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if (skb) {
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u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
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if (ps && skb_queue_empty(&mtxq->retry_q))
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ieee80211_sta_set_buffered(txq->sta, tid, false);
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return skb;
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}
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skb = ieee80211_tx_dequeue(dev->hw, txq);
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if (!skb)
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return NULL;
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return skb;
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}
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static void
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mt76_check_agg_ssn(struct mt76_txq *mtxq, struct sk_buff *skb)
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{
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
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if (!ieee80211_is_data_qos(hdr->frame_control) ||
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!ieee80211_is_data_present(hdr->frame_control))
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return;
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mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
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}
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static void
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mt76_queue_ps_skb(struct mt76_dev *dev, struct ieee80211_sta *sta,
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struct sk_buff *skb, bool last)
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{
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struct mt76_wcid *wcid = (struct mt76_wcid *) sta->drv_priv;
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct mt76_queue *hwq = &dev->q_tx[MT_TXQ_PSD];
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info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
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if (last)
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info->flags |= IEEE80211_TX_STATUS_EOSP;
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mt76_skb_set_moredata(skb, !last);
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dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid, sta);
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}
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void
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mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
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u16 tids, int nframes,
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enum ieee80211_frame_release_type reason,
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bool more_data)
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{
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struct mt76_dev *dev = hw->priv;
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struct sk_buff *last_skb = NULL;
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struct mt76_queue *hwq = &dev->q_tx[MT_TXQ_PSD];
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int i;
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spin_lock_bh(&hwq->lock);
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for (i = 0; tids && nframes; i++, tids >>= 1) {
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struct ieee80211_txq *txq = sta->txq[i];
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struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
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struct sk_buff *skb;
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if (!(tids & 1))
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continue;
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do {
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skb = mt76_txq_dequeue(dev, mtxq, true);
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if (!skb)
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break;
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if (mtxq->aggr)
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mt76_check_agg_ssn(mtxq, skb);
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nframes--;
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if (last_skb)
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mt76_queue_ps_skb(dev, sta, last_skb, false);
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last_skb = skb;
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} while (nframes);
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}
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if (last_skb) {
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mt76_queue_ps_skb(dev, sta, last_skb, true);
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dev->queue_ops->kick(dev, hwq);
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}
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spin_unlock_bh(&hwq->lock);
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}
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EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
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static int
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mt76_txq_send_burst(struct mt76_dev *dev, struct mt76_queue *hwq,
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struct mt76_txq *mtxq, bool *empty)
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{
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struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
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struct ieee80211_tx_info *info;
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struct mt76_wcid *wcid = mtxq->wcid;
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struct sk_buff *skb;
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int n_frames = 1, limit;
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struct ieee80211_tx_rate tx_rate;
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bool ampdu;
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bool probe;
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int idx;
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skb = mt76_txq_dequeue(dev, mtxq, false);
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if (!skb) {
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*empty = true;
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return 0;
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}
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info = IEEE80211_SKB_CB(skb);
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if (!wcid->tx_rate_set)
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ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
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info->control.rates, 1);
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tx_rate = info->control.rates[0];
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probe = (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
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ampdu = IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU;
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limit = ampdu ? 16 : 3;
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if (ampdu)
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mt76_check_agg_ssn(mtxq, skb);
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idx = dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid, txq->sta);
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if (idx < 0)
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return idx;
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do {
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bool cur_ampdu;
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if (probe)
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break;
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if (test_bit(MT76_OFFCHANNEL, &dev->state) ||
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test_bit(MT76_RESET, &dev->state))
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return -EBUSY;
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skb = mt76_txq_dequeue(dev, mtxq, false);
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if (!skb) {
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*empty = true;
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break;
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}
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info = IEEE80211_SKB_CB(skb);
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cur_ampdu = info->flags & IEEE80211_TX_CTL_AMPDU;
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if (ampdu != cur_ampdu ||
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(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
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skb_queue_tail(&mtxq->retry_q, skb);
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break;
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}
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info->control.rates[0] = tx_rate;
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if (cur_ampdu)
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mt76_check_agg_ssn(mtxq, skb);
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idx = dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid,
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txq->sta);
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if (idx < 0)
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return idx;
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n_frames++;
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} while (n_frames < limit);
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if (!probe) {
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hwq->swq_queued++;
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hwq->entry[idx].schedule = true;
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}
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dev->queue_ops->kick(dev, hwq);
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return n_frames;
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}
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static int
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mt76_txq_schedule_list(struct mt76_dev *dev, struct mt76_queue *hwq)
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{
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struct mt76_txq *mtxq, *mtxq_last;
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int len = 0;
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restart:
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mtxq_last = list_last_entry(&hwq->swq, struct mt76_txq, list);
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while (!list_empty(&hwq->swq)) {
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bool empty = false;
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int cur;
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if (test_bit(MT76_OFFCHANNEL, &dev->state) ||
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test_bit(MT76_RESET, &dev->state))
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return -EBUSY;
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mtxq = list_first_entry(&hwq->swq, struct mt76_txq, list);
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if (mtxq->send_bar && mtxq->aggr) {
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struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
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struct ieee80211_sta *sta = txq->sta;
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struct ieee80211_vif *vif = txq->vif;
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u16 agg_ssn = mtxq->agg_ssn;
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u8 tid = txq->tid;
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mtxq->send_bar = false;
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spin_unlock_bh(&hwq->lock);
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ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
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spin_lock_bh(&hwq->lock);
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goto restart;
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}
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list_del_init(&mtxq->list);
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cur = mt76_txq_send_burst(dev, hwq, mtxq, &empty);
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if (!empty)
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list_add_tail(&mtxq->list, &hwq->swq);
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if (cur < 0)
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return cur;
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len += cur;
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if (mtxq == mtxq_last)
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break;
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}
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return len;
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}
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void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq)
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{
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int len;
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rcu_read_lock();
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do {
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if (hwq->swq_queued >= 4 || list_empty(&hwq->swq))
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break;
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len = mt76_txq_schedule_list(dev, hwq);
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} while (len > 0);
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rcu_read_unlock();
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}
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EXPORT_SYMBOL_GPL(mt76_txq_schedule);
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void mt76_txq_schedule_all(struct mt76_dev *dev)
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{
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int i;
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for (i = 0; i <= MT_TXQ_BK; i++) {
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struct mt76_queue *q = &dev->q_tx[i];
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spin_lock_bh(&q->lock);
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mt76_txq_schedule(dev, q);
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spin_unlock_bh(&q->lock);
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}
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}
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EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
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void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
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bool send_bar)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
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struct ieee80211_txq *txq = sta->txq[i];
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struct mt76_txq *mtxq;
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if (!txq)
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continue;
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mtxq = (struct mt76_txq *)txq->drv_priv;
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spin_lock_bh(&mtxq->hwq->lock);
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mtxq->send_bar = mtxq->aggr && send_bar;
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if (!list_empty(&mtxq->list))
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list_del_init(&mtxq->list);
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spin_unlock_bh(&mtxq->hwq->lock);
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}
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}
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EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
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void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
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{
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struct mt76_dev *dev = hw->priv;
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struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
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struct mt76_queue *hwq = mtxq->hwq;
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spin_lock_bh(&hwq->lock);
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if (list_empty(&mtxq->list))
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list_add_tail(&mtxq->list, &hwq->swq);
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mt76_txq_schedule(dev, hwq);
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spin_unlock_bh(&hwq->lock);
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}
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EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
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void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq)
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{
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struct mt76_txq *mtxq;
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struct mt76_queue *hwq;
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struct sk_buff *skb;
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if (!txq)
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return;
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mtxq = (struct mt76_txq *) txq->drv_priv;
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hwq = mtxq->hwq;
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||
|
spin_lock_bh(&hwq->lock);
|
||
|
if (!list_empty(&mtxq->list))
|
||
|
list_del(&mtxq->list);
|
||
|
spin_unlock_bh(&hwq->lock);
|
||
|
|
||
|
while ((skb = skb_dequeue(&mtxq->retry_q)) != NULL)
|
||
|
ieee80211_free_txskb(dev->hw, skb);
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(mt76_txq_remove);
|
||
|
|
||
|
void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
|
||
|
{
|
||
|
struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
|
||
|
|
||
|
INIT_LIST_HEAD(&mtxq->list);
|
||
|
skb_queue_head_init(&mtxq->retry_q);
|
||
|
|
||
|
mtxq->hwq = &dev->q_tx[mt76_txq_get_qid(txq)];
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(mt76_txq_init);
|