421 lines
10 KiB
C
421 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Watchdog driver for Atmel AT91SAM9x processors.
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*
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* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
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*
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*/
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/*
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* The Watchdog Timer Mode Register can be only written to once. If the
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* timeout need to be set from Linux, be sure that the bootstrap or the
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* bootloader doesn't write to this register.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <linux/jiffies.h>
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#include <linux/timer.h>
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#include <linux/bitops.h>
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#include <linux/uaccess.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include "at91sam9_wdt.h"
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#define DRV_NAME "AT91SAM9 Watchdog"
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#define wdt_read(wdt, field) \
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readl_relaxed((wdt)->base + (field))
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#define wdt_write(wtd, field, val) \
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writel_relaxed((val), (wdt)->base + (field))
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/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
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* use this to convert a watchdog
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* value from/to milliseconds.
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*/
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#define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8)
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#define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8)
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#define ticks_to_secs(t) (((t) + 1) >> 8)
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#define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0)
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#define WDT_MR_RESET 0x3FFF2FFF
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/* Watchdog max counter value in ticks */
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#define WDT_COUNTER_MAX_TICKS 0xFFF
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/* Watchdog max delta/value in secs */
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#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
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/* Hardware timeout in seconds */
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#define WDT_HW_TIMEOUT 2
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/* Timer heartbeat (500ms) */
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#define WDT_TIMEOUT (HZ/2)
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/* User land timeout */
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#define WDT_HEARTBEAT 15
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static int heartbeat;
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
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"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
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struct at91wdt {
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struct watchdog_device wdd;
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void __iomem *base;
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unsigned long next_heartbeat; /* the next_heartbeat for the timer */
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struct timer_list timer; /* The timer that pings the watchdog */
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u32 mr;
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u32 mr_mask;
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unsigned long heartbeat; /* WDT heartbeat in jiffies */
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bool nowayout;
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unsigned int irq;
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struct clk *sclk;
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};
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/* ......................................................................... */
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static irqreturn_t wdt_interrupt(int irq, void *dev_id)
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{
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struct at91wdt *wdt = (struct at91wdt *)dev_id;
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if (wdt_read(wdt, AT91_WDT_SR)) {
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pr_crit("at91sam9 WDT software reset\n");
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emergency_restart();
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pr_crit("Reboot didn't ?????\n");
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}
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return IRQ_HANDLED;
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}
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/*
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* Reload the watchdog timer. (ie, pat the watchdog)
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*/
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static inline void at91_wdt_reset(struct at91wdt *wdt)
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{
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wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
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}
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/*
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* Timer tick
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*/
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static void at91_ping(struct timer_list *t)
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{
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struct at91wdt *wdt = from_timer(wdt, t, timer);
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if (time_before(jiffies, wdt->next_heartbeat) ||
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!watchdog_active(&wdt->wdd)) {
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at91_wdt_reset(wdt);
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mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
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} else {
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pr_crit("I will reset your machine !\n");
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}
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}
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static int at91_wdt_start(struct watchdog_device *wdd)
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{
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struct at91wdt *wdt = to_wdt(wdd);
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/* calculate when the next userspace timeout will be */
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wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
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return 0;
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}
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static int at91_wdt_stop(struct watchdog_device *wdd)
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{
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/* The watchdog timer hardware can not be stopped... */
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return 0;
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}
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static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
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{
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wdd->timeout = new_timeout;
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return at91_wdt_start(wdd);
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}
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static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
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{
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u32 tmp;
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u32 delta;
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u32 value;
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int err;
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u32 mask = wdt->mr_mask;
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unsigned long min_heartbeat = 1;
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unsigned long max_heartbeat;
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struct device *dev = &pdev->dev;
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tmp = wdt_read(wdt, AT91_WDT_MR);
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if ((tmp & mask) != (wdt->mr & mask)) {
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if (tmp == WDT_MR_RESET) {
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wdt_write(wdt, AT91_WDT_MR, wdt->mr);
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tmp = wdt_read(wdt, AT91_WDT_MR);
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}
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}
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if (tmp & AT91_WDT_WDDIS) {
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if (wdt->mr & AT91_WDT_WDDIS)
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return 0;
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dev_err(dev, "watchdog is disabled\n");
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return -EINVAL;
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}
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value = tmp & AT91_WDT_WDV;
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delta = (tmp & AT91_WDT_WDD) >> 16;
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if (delta < value)
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min_heartbeat = ticks_to_hz_roundup(value - delta);
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max_heartbeat = ticks_to_hz_rounddown(value);
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if (!max_heartbeat) {
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dev_err(dev,
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"heartbeat is too small for the system to handle it correctly\n");
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return -EINVAL;
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}
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/*
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* Try to reset the watchdog counter 4 or 2 times more often than
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* actually requested, to avoid spurious watchdog reset.
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* If this is not possible because of the min_heartbeat value, reset
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* it at the min_heartbeat period.
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*/
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if ((max_heartbeat / 4) >= min_heartbeat)
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wdt->heartbeat = max_heartbeat / 4;
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else if ((max_heartbeat / 2) >= min_heartbeat)
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wdt->heartbeat = max_heartbeat / 2;
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else
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wdt->heartbeat = min_heartbeat;
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if (max_heartbeat < min_heartbeat + 4)
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dev_warn(dev,
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"min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
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if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
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err = request_irq(wdt->irq, wdt_interrupt,
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IRQF_SHARED | IRQF_IRQPOLL |
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IRQF_NO_SUSPEND,
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pdev->name, wdt);
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if (err)
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return err;
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}
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if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
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dev_warn(dev,
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"watchdog already configured differently (mr = %x expecting %x)\n",
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tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
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timer_setup(&wdt->timer, at91_ping, 0);
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/*
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* Use min_heartbeat the first time to avoid spurious watchdog reset:
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* we don't know for how long the watchdog counter is running, and
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* - resetting it right now might trigger a watchdog fault reset
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* - waiting for heartbeat time might lead to a watchdog timeout
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* reset
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*/
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mod_timer(&wdt->timer, jiffies + min_heartbeat);
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/* Try to set timeout from device tree first */
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if (watchdog_init_timeout(&wdt->wdd, 0, dev))
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watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
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watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
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err = watchdog_register_device(&wdt->wdd);
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if (err)
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goto out_stop_timer;
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wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
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return 0;
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out_stop_timer:
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del_timer(&wdt->timer);
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return err;
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}
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/* ......................................................................... */
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static const struct watchdog_info at91_wdt_info = {
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.identity = DRV_NAME,
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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static const struct watchdog_ops at91_wdt_ops = {
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.owner = THIS_MODULE,
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.start = at91_wdt_start,
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.stop = at91_wdt_stop,
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.set_timeout = at91_wdt_set_timeout,
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};
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#if defined(CONFIG_OF)
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static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
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{
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u32 min = 0;
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u32 max = WDT_COUNTER_MAX_SECS;
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const char *tmp;
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/* Get the interrupts property */
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wdt->irq = irq_of_parse_and_map(np, 0);
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if (!wdt->irq)
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dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
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if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
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&max)) {
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if (!max || max > WDT_COUNTER_MAX_SECS)
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max = WDT_COUNTER_MAX_SECS;
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if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
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0, &min)) {
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if (min >= max)
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min = max - 1;
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}
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}
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min = secs_to_ticks(min);
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max = secs_to_ticks(max);
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wdt->mr_mask = 0x3FFFFFFF;
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wdt->mr = 0;
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if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
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!strcmp(tmp, "software")) {
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wdt->mr |= AT91_WDT_WDFIEN;
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wdt->mr_mask &= ~AT91_WDT_WDRPROC;
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} else {
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wdt->mr |= AT91_WDT_WDRSTEN;
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}
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if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
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!strcmp(tmp, "proc"))
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wdt->mr |= AT91_WDT_WDRPROC;
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if (of_property_read_bool(np, "atmel,disable")) {
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wdt->mr |= AT91_WDT_WDDIS;
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wdt->mr_mask &= AT91_WDT_WDDIS;
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}
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if (of_property_read_bool(np, "atmel,idle-halt"))
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wdt->mr |= AT91_WDT_WDIDLEHLT;
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if (of_property_read_bool(np, "atmel,dbg-halt"))
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wdt->mr |= AT91_WDT_WDDBGHLT;
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wdt->mr |= max | ((max - min) << 16);
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return 0;
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}
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#else
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static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
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{
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return 0;
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}
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#endif
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static int __init at91wdt_probe(struct platform_device *pdev)
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{
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struct resource *r;
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int err;
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struct at91wdt *wdt;
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wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
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AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
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wdt->mr_mask = 0x3FFFFFFF;
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wdt->nowayout = nowayout;
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wdt->wdd.parent = &pdev->dev;
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wdt->wdd.info = &at91_wdt_info;
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wdt->wdd.ops = &at91_wdt_ops;
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wdt->wdd.timeout = WDT_HEARTBEAT;
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wdt->wdd.min_timeout = 1;
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wdt->wdd.max_timeout = 0xFFFF;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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wdt->base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(wdt->base))
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return PTR_ERR(wdt->base);
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wdt->sclk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(wdt->sclk))
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return PTR_ERR(wdt->sclk);
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err = clk_prepare_enable(wdt->sclk);
|
||
|
|
if (err) {
|
||
|
|
dev_err(&pdev->dev, "Could not enable slow clock\n");
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (pdev->dev.of_node) {
|
||
|
|
err = of_at91wdt_init(pdev->dev.of_node, wdt);
|
||
|
|
if (err)
|
||
|
|
goto err_clk;
|
||
|
|
}
|
||
|
|
|
||
|
|
err = at91_wdt_init(pdev, wdt);
|
||
|
|
if (err)
|
||
|
|
goto err_clk;
|
||
|
|
|
||
|
|
platform_set_drvdata(pdev, wdt);
|
||
|
|
|
||
|
|
pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
|
||
|
|
wdt->wdd.timeout, wdt->nowayout);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
err_clk:
|
||
|
|
clk_disable_unprepare(wdt->sclk);
|
||
|
|
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int __exit at91wdt_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct at91wdt *wdt = platform_get_drvdata(pdev);
|
||
|
|
watchdog_unregister_device(&wdt->wdd);
|
||
|
|
|
||
|
|
pr_warn("I quit now, hardware will probably reboot!\n");
|
||
|
|
del_timer(&wdt->timer);
|
||
|
|
clk_disable_unprepare(wdt->sclk);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(CONFIG_OF)
|
||
|
|
static const struct of_device_id at91_wdt_dt_ids[] = {
|
||
|
|
{ .compatible = "atmel,at91sam9260-wdt" },
|
||
|
|
{ /* sentinel */ }
|
||
|
|
};
|
||
|
|
|
||
|
|
MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static struct platform_driver at91wdt_driver = {
|
||
|
|
.remove = __exit_p(at91wdt_remove),
|
||
|
|
.driver = {
|
||
|
|
.name = "at91_wdt",
|
||
|
|
.of_match_table = of_match_ptr(at91_wdt_dt_ids),
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
|
||
|
|
MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
|
||
|
|
MODULE_LICENSE("GPL");
|