/*
 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&pio {
	btp_sleep: btp_sleep_enable {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,121), 0)>;
			bias-pull-down;
			drive-strength = <1>;
		};
	};
	btp_ldo_en: btp_ldo_enable {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,96), 0)>;
			bias-pull-down;
			drive-strength = <1>;
		};
	};
	spi5_set_miso: set_miso {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,100), 1)>;
			drive-strength = <4>;
		};
	};
	spi5_set_cs: set_cs {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,99), 1)>;
			drive-strength = <4>;
		};
	};
	spi5_set_mosi: set_mosi {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,101), 1)>;
			drive-strength = <4>;
		};
	};
	spi5_set_clk: set_clk {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,98), 1)>;
			drive-strength = <4>;
		};
	};
	spi5_clr_miso: clr_miso {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,100), 0)>;
			slew-rate = <0>;
			bias-pull-down;
			input-enable;
			drive-strength = <1>;
		};
	};
	spi5_clr_cs: clr_cs {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,99), 0)>;
			slew-rate = <0>;
			bias-pull-down;
			output-low;
			drive-strength = <1>;
		};
	};
	spi5_clr_mosi: clr_mosi {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,101), 0)>;
			slew-rate = <0>;
			bias-pull-down;
			output-low;
			drive-strength = <1>;
		};
	};
	spi5_clr_clk: clr_clk {
		pins_cmd_dat{
			pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,98), 0)>;
			slew-rate = <0>;
			bias-pull-down;
			output-low;
			drive-strength = <1>;
		};
	};
};

#if defined(CONFIG_SEC_FACTORY) || !1
&spi5 {
	status = "okay";
	max-dma = <0x40000>;
#else
&smd {
#endif
	#address-cells = <1>;
	#size-cells = <0>;

	etspi-spi@0 {
		compatible = "etspi,el7xx";
		reg = <0x00>;
		spi-max-frequency = <25000000>;
#if !defined(CONFIG_SEC_FACTORY) && 1
		clocks = <&topckgen_clk CLK_TOP_MAINPLL_D5_D4>,
			<&topckgen_clk CLK_TOP_SPI_SEL>,
			<&infracfg_ao_clk CLK_IFRAO_SPI5>;
		clock-names = "parent-clk", "sel-clk", "spi-clk";
#endif

		pinctrl-names = "default", "pins_poweron", "pins_poweroff";
		pinctrl-0 = <&btp_sleep &btp_ldo_en>;
		pinctrl-1 = <&spi5_set_miso &spi5_set_cs &spi5_set_mosi &spi5_set_clk>;
		pinctrl-2 = <&spi5_clr_miso &spi5_clr_cs &spi5_clr_mosi &spi5_clr_clk>;


		gpio-controller;
		#gpio-cells = <2>;

		etspi-sleepPin = <SEC_GPIO_REF(AP,pio,121) 0>;
		etspi-ldoPin = <SEC_GPIO_REF(AP,pio,96) 0>;
		etspi-chipid = "EL721";
		etspi-modelinfo = "A346";
		etspi-position = "11.69,0.00,9.10,9.10,14.80,14.80,12.00,12.00,5.00";
		etspi-rb = "588,-1,-1,FFFFFF";
		controller-data {
			mediatek,tckdly = <1>;
		};
	};
};