* MediaTek's I2C controller

The MediaTek's I2C controller is used to interface with I2C devices.

Required properties:
  - compatible: value should be either of the following.
      "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
      "mediatek,mt2712-i2c": for MediaTek MT2712
      "mediatek,mt6577-i2c": for MediaTek MT6577
      "mediatek,mt6589-i2c": for MediaTek MT6589
      "mediatek,mt6779-i2c", "mediatek,mt8183-i2c": for MediaTek MT6779
      "mediatek,mt7622-i2c": for MediaTek MT7622
      "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
      "mediatek,mt8173-i2c": for MediaTek MT8173
      "mediatek,mt8183-i2c": for MediaTek MT8183
  - reg: physical base address of the controller and dma base, length of memory
    mapped region.
  - interrupts: interrupt number to the cpu.
  - clock-div: the fixed value for frequency divider of clock source in i2c
    module. Each IC may be different.
  - clocks: clock name from clock manager
  - clock-names: Must include "main" and "dma", "arb" is for multi-master that
    one bus has more than two i2c controllers, if enable have-pmic need include
    "pmic" extra.

Optional properties:
  - clock-frequency: Frequency in Hz of the bus when transfer, the default value
    is 100000.
  - mediatek,have-pmic: platform can control i2c form special pmic side.
    Only mt6589 and mt8135 support this feature.
  - mediatek,use-push-pull: IO config use push-pull mode.

Example:

	i2c0: i2c@1100d000 {
			compatible = "mediatek,mt6577-i2c";
			reg = <0x1100d000 0x70>,
			      <0x11000300 0x80>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
			clock-frequency = <400000>;
			mediatek,have-pmic;
			clock-div = <16>;
			clocks = <&i2c0_ck>, <&ap_dma_ck>;
			clock-names = "main", "dma";
	};