/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2019 MediaTek Inc. */ #include #include #include #include "clk-mtk.h" #include "clk-gate.h" #include #define MT_CCF_BRINGUP 1 /* Regular Number Definition */ #define INV_OFS -1 #define INV_BIT -1 /* get spm power status struct to register inside clk_data */ static struct pwr_status cam_m_pwr_stat = GATE_PWR_STAT(0xEF0, 0xEF4, INV_OFS, BIT(23), BIT(23)); static const struct mtk_gate_regs cam_m_cg_regs = { .set_ofs = 0x4, .clr_ofs = 0x8, .sta_ofs = 0x0, }; #define GATE_CAM_M(_id, _name, _parent, _shift) { \ .id = _id, \ .name = _name, \ .parent_name = _parent, \ .regs = &cam_m_cg_regs, \ .shift = _shift, \ .ops = &mtk_clk_gate_ops_setclr, \ .pwr_stat = &cam_m_pwr_stat, \ } static const struct mtk_gate cam_m_clks[] = { GATE_CAM_M(CLK_CAM_M_LARB13, "cam_m_larb13", "cam_ck"/* parent */, 0), GATE_CAM_M(CLK_CAM_M_LARB14, "cam_m_larb14", "cam_ck"/* parent */, 2), GATE_CAM_M(CLK_CAM_M_CAM, "cam_m_cam", "cam_ck"/* parent */, 6), GATE_CAM_M(CLK_CAM_M_CAMTG, "cam_m_camtg", "cam_ck"/* parent */, 7), GATE_CAM_M(CLK_CAM_M_SENINF, "cam_m_seninf", "cam_ck"/* parent */, 8), GATE_CAM_M(CLK_CAM_M_CAMSV0, "cam_m_camsv0", "cam_ck"/* parent */, 9), GATE_CAM_M(CLK_CAM_M_CAMSV1, "cam_m_camsv1", "cam_ck"/* parent */, 10), GATE_CAM_M(CLK_CAM_M_CAMSV2, "cam_m_camsv2", "cam_ck"/* parent */, 11), GATE_CAM_M(CLK_CAM_M_CAMSV3, "cam_m_camsv3", "cam_ck"/* parent */, 12), GATE_CAM_M(CLK_CAM_M_CCU0, "cam_m_ccu0", "cam_ck"/* parent */, 13), GATE_CAM_M(CLK_CAM_M_CCU1, "cam_m_ccu1", "cam_ck"/* parent */, 14), GATE_CAM_M(CLK_CAM_M_MRAW0, "cam_m_mraw0", "cam_ck"/* parent */, 15), GATE_CAM_M(CLK_CAM_M_CCU_GALS, "cam_m_ccu_gals", "cam_ck"/* parent */, 18), GATE_CAM_M(CLK_CAM_M_CAM2MM_GALS, "cam_m_cam2mm_gals", "cam_ck"/* parent */, 19), GATE_CAM_M(CLK_CAM_M_CAMSV4, "cam_m_camsv4", "cam_ck"/* parent */, 20), GATE_CAM_M(CLK_CAM_M_PDA, "cam_m_pda", "cam_ck"/* parent */, 21), }; /* get spm power status struct to register inside clk_data */ static struct pwr_status cam_ra_pwr_stat = GATE_PWR_STAT(0xEF0, 0xEF4, INV_OFS, BIT(24), BIT(24)); static const struct mtk_gate_regs cam_ra_cg_regs = { .set_ofs = 0x4, .clr_ofs = 0x8, .sta_ofs = 0x0, }; #define GATE_CAM_RA(_id, _name, _parent, _shift) { \ .id = _id, \ .name = _name, \ .parent_name = _parent, \ .regs = &cam_ra_cg_regs, \ .shift = _shift, \ .ops = &mtk_clk_gate_ops_setclr, \ .pwr_stat = &cam_ra_pwr_stat, \ } static const struct mtk_gate cam_ra_clks[] = { GATE_CAM_RA(CLK_CAM_RA_LARBX, "cam_ra_larbx", "cam_ck"/* parent */, 0), GATE_CAM_RA(CLK_CAM_RA_CAM, "cam_ra_cam", "cam_ck"/* parent */, 1), GATE_CAM_RA(CLK_CAM_RA_CAMTG, "cam_ra_camtg", "cam_ck"/* parent */, 2), }; /* get spm power status struct to register inside clk_data */ static struct pwr_status cam_rb_pwr_stat = GATE_PWR_STAT(0xEF0, 0xEF4, INV_OFS, BIT(25), BIT(25)); static const struct mtk_gate_regs cam_rb_cg_regs = { .set_ofs = 0x4, .clr_ofs = 0x8, .sta_ofs = 0x0, }; #define GATE_CAM_RB(_id, _name, _parent, _shift) { \ .id = _id, \ .name = _name, \ .parent_name = _parent, \ .regs = &cam_rb_cg_regs, \ .shift = _shift, \ .ops = &mtk_clk_gate_ops_setclr, \ .pwr_stat = &cam_rb_pwr_stat, \ } static const struct mtk_gate cam_rb_clks[] = { GATE_CAM_RB(CLK_CAM_RB_LARBX, "cam_rb_larbx", "cam_ck"/* parent */, 0), GATE_CAM_RB(CLK_CAM_RB_CAM, "cam_rb_cam", "cam_ck"/* parent */, 1), GATE_CAM_RB(CLK_CAM_RB_CAMTG, "cam_rb_camtg", "cam_ck"/* parent */, 2), }; static int clk_mt6877_cam_m_probe(struct platform_device *pdev) { struct clk_onecell_data *clk_data; int r; struct device_node *node = pdev->dev.of_node; #if MT_CCF_BRINGUP pr_notice("%s init begin\n", __func__); #endif clk_data = mtk_alloc_clk_data(CLK_CAM_M_NR_CLK); mtk_clk_register_gates(node, cam_m_clks, ARRAY_SIZE(cam_m_clks), clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); #if MT_CCF_BRINGUP pr_notice("%s init end\n", __func__); #endif return r; } static int clk_mt6877_cam_ra_probe(struct platform_device *pdev) { struct clk_onecell_data *clk_data; int r; struct device_node *node = pdev->dev.of_node; #if MT_CCF_BRINGUP pr_notice("%s init begin\n", __func__); #endif clk_data = mtk_alloc_clk_data(CLK_CAM_RA_NR_CLK); mtk_clk_register_gates(node, cam_ra_clks, ARRAY_SIZE(cam_ra_clks), clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); #if MT_CCF_BRINGUP pr_notice("%s init end\n", __func__); #endif return r; } static int clk_mt6877_cam_rb_probe(struct platform_device *pdev) { struct clk_onecell_data *clk_data; int r; struct device_node *node = pdev->dev.of_node; #if MT_CCF_BRINGUP pr_notice("%s init begin\n", __func__); #endif clk_data = mtk_alloc_clk_data(CLK_CAM_RB_NR_CLK); mtk_clk_register_gates(node, cam_rb_clks, ARRAY_SIZE(cam_rb_clks), clk_data); r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); #if MT_CCF_BRINGUP pr_notice("%s init end\n", __func__); #endif return r; } static const struct of_device_id of_match_clk_mt6877_cam[] = { { .compatible = "mediatek,mt6877-camsys_main", .data = clk_mt6877_cam_m_probe, }, { .compatible = "mediatek,mt6877-camsys_rawa", .data = clk_mt6877_cam_ra_probe, }, { .compatible = "mediatek,mt6877-camsys_rawb", .data = clk_mt6877_cam_rb_probe, }, { /* sentinel */ } }; static int clk_mt6877_cam_probe(struct platform_device *pdev) { int (*clk_probe)(struct platform_device *pd); int r; clk_probe = of_device_get_match_data(&pdev->dev); if (!clk_probe) return -EINVAL; r = clk_probe(pdev); if (r) dev_err(&pdev->dev, "could not register clock provider: %s: %d\n", pdev->name, r); return r; } static struct platform_driver clk_mt6877_cam_drv = { .probe = clk_mt6877_cam_probe, .driver = { .name = "clk-mt6877-cam", .of_match_table = of_match_clk_mt6877_cam, }, }; static int __init clk_mt6877_cam_init(void) { return platform_driver_register(&clk_mt6877_cam_drv); } arch_initcall(clk_mt6877_cam_init);