/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2020 MediaTek Inc.
 * Author: Owen Chen <owen.chen@mediatek.com>
 */

#ifndef _DT_BINDINGS_POWER_MT6893_POWER_H
#define _DT_BINDINGS_POWER_MT6893_POWER_H

#define MT6893_POWER_DOMAIN_MFG0			0
#define MT6893_POWER_DOMAIN_MFG1			1
#define MT6893_POWER_DOMAIN_MFG2			2
#define MT6893_POWER_DOMAIN_MFG3			3
#define MT6893_POWER_DOMAIN_MFG4			4
#define MT6893_POWER_DOMAIN_MFG5			5
#define MT6893_POWER_DOMAIN_MFG6			6
#define MT6893_POWER_DOMAIN_ISP				7
#define MT6893_POWER_DOMAIN_ISP2			8
#define MT6893_POWER_DOMAIN_IPE				9
#define MT6893_POWER_DOMAIN_VDEC			10
#define MT6893_POWER_DOMAIN_VDEC2			11
#define MT6893_POWER_DOMAIN_VENC			12
#define MT6893_POWER_DOMAIN_VENC_CORE1			13
#define MT6893_POWER_DOMAIN_MDP				14
#define MT6893_POWER_DOMAIN_DISP			15
#define MT6893_POWER_DOMAIN_AUDIO			16
#define MT6893_POWER_DOMAIN_ADSP_DORMANT		17
#define MT6893_POWER_DOMAIN_CAM				18
#define MT6893_POWER_DOMAIN_CAM_RAWA			19
#define MT6893_POWER_DOMAIN_CAM_RAWB			20
#define MT6893_POWER_DOMAIN_CAM_RAWC			21
#define MT6893_POWER_DOMAIN_DP_TX			22
#define MT6893_POWER_DOMAIN_MD				23
#define MT6893_POWER_DOMAIN_CONN			24
#define MT6893_POWER_DOMAIN_APU				25
#define MT6893_POWER_DOMAIN_NR				26

#endif /* _DT_BINDINGS_POWER_MT6893_POWER_H */