/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2019 MediaTek Inc. */ /******************************************** * MT6768 MSDC DTSI File ********************************************/ #include &mmc0 { status = "okay"; pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; pinctrl-1 = <&mmc0_pins_uhs>; bus-width = <8>; max-frequency = <200000000>; cap-mmc-highspeed; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sdio; no-sd; hs400-ds-delay = <0x12814>; mediatek,cqhci; vmmc-supply = <&mt_pmic_vemc_ldo_reg>; non-removable; }; &pio { mmc0_pins_default: mmc0default { pins_cmd_dat { pinmux = , , , , , , , , ; input-enable; }; pins_clk { pinmux = ; }; pins_rst { pinmux = ; }; }; mmc0_pins_uhs: mmc0@0{ pins_cmd_dat { pinmux = , , , , , , , , ; input-enable; drive-strength = <4>; }; pins_clk { pinmux = ; drive-strength = <4>; }; pins_ds { pinmux = ; drive-strength = <4>; }; pins_rst { pinmux = ; drive-strength = <4>; }; }; }; &mmc1 { status = "okay"; pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_uhs>; bus-width = <4>; max-frequency = <200000000>; cap-sd-highspeed; sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-sdr104; sd-uhs-ddr50; cd-gpios = <&pio 18 GPIO_ACTIVE_LOW>; vmmc-supply = <&mt_pmic_vmch_ldo_reg>; vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; no-mmc; no-sdio; }; &pio { mmc1_pins_default: mmc1default { pins_cmd_dat { pinmux = , , , , ; input-enable; drive-strength = <3>; }; pins_clk { pinmux = ; drive-strength = <3>; }; pins_insert { pinmux = ; bias-pull-up; }; }; mmc1_pins_uhs: mmc1@0{ pins_cmd_dat { pinmux = , , , , ; input-enable; drive-strength = <3>; }; pins_clk { pinmux = ; drive-strength = <3>; }; }; };