// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Device Tree Include file for Marvell Armada 37xx family of SoCs. * * Copyright (C) 2016 Marvell * * Gregory CLEMENT * */ #include / { model = "Marvell Armada 37xx SoC"; compatible = "marvell,armada3700"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &uart0; serial1 = &uart1; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* * The PSCI firmware region depicted below is the default one * and should be updated by the bootloader. */ psci-area@4000000 { reg = <0 0x4000000 0 0x200000>; no-map; }; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0>; clocks = <&nb_periph_clk 16>; enable-method = "psci"; }; }; psci { compatible = "arm,psci-0.2"; method = "smc"; }; timer { compatible = "arm,armv8-timer"; interrupts = , , , ; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; }; soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; internal-regs@d0000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; /* 32M internal register @ 0xd000_0000 */ ranges = <0x0 0x0 0xd0000000 0x2000000>; spi0: spi@10600 { compatible = "marvell,armada-3700-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x10600 0xA00>; clocks = <&nb_periph_clk 7>; interrupts = ; num-cs = <4>; status = "disabled"; }; i2c0: i2c@11000 { compatible = "marvell,armada-3700-i2c"; reg = <0x11000 0x24>; #address-cells = <1>; #size-cells = <0>; clocks = <&nb_periph_clk 10>; interrupts = ; mrvl,i2c-fast-mode; status = "disabled"; }; i2c1: i2c@11080 { compatible = "marvell,armada-3700-i2c"; reg = <0x11080 0x24>; #address-cells = <1>; #size-cells = <0>; clocks = <&nb_periph_clk 9>; interrupts = ; mrvl,i2c-fast-mode; status = "disabled"; }; avs: avs@11500 { compatible = "marvell,armada-3700-avs", "syscon"; reg = <0x11500 0x40>; }; uart0: serial@12000 { compatible = "marvell,armada-3700-uart"; reg = <0x12000 0x200>; clocks = <&xtalclk>; interrupts = , , ; interrupt-names = "uart-sum", "uart-tx", "uart-rx"; status = "disabled"; }; uart1: serial@12200 { compatible = "marvell,armada-3700-uart-ext"; reg = <0x12200 0x30>; clocks = <&xtalclk>; interrupts = , ; interrupt-names = "uart-tx", "uart-rx"; status = "disabled"; }; nb_periph_clk: nb-periph-clk@13000 { compatible = "marvell,armada-3700-periph-clock-nb", "syscon"; reg = <0x13000 0x100>; clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; #clock-cells = <1>; }; sb_periph_clk: sb-periph-clk@18000 { compatible = "marvell,armada-3700-periph-clock-sb"; reg = <0x18000 0x100>; clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; #clock-cells = <1>; }; tbg: tbg@13200 { compatible = "marvell,armada-3700-tbg-clock"; reg = <0x13200 0x100>; clocks = <&xtalclk>; #clock-cells = <1>; }; pinctrl_nb: pinctrl@13800 { compatible = "marvell,armada3710-nb-pinctrl", "syscon", "simple-mfd"; reg = <0x13800 0x100>, <0x13C00 0x20>; /* MPP1[19:0] */ gpionb: gpio { #gpio-cells = <2>; gpio-ranges = <&pinctrl_nb 0 0 36>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = , , , , , , , , , , , ; }; xtalclk: xtal-clk { compatible = "marvell,armada-3700-xtal-clock"; clock-output-names = "xtal"; #clock-cells = <0>; }; spi_quad_pins: spi-quad-pins { groups = "spi_quad"; function = "spi"; }; i2c1_pins: i2c1-pins { groups = "i2c1"; function = "i2c"; }; i2c2_pins: i2c2-pins { groups = "i2c2"; function = "i2c"; }; uart1_pins: uart1-pins { groups = "uart1"; function = "uart"; }; uart2_pins: uart2-pins { groups = "uart2"; function = "uart"; }; }; nb_pm: syscon@14000 { compatible = "marvell,armada-3700-nb-pm", "syscon"; reg = <0x14000 0x60>; }; pinctrl_sb: pinctrl@18800 { compatible = "marvell,armada3710-sb-pinctrl", "syscon", "simple-mfd"; reg = <0x18800 0x100>, <0x18C00 0x20>; /* MPP2[23:0] */ gpiosb: gpio { #gpio-cells = <2>; gpio-ranges = <&pinctrl_sb 0 0 30>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; interrupts = , , , , ; }; rgmii_pins: mii-pins { groups = "rgmii"; function = "mii"; }; }; eth0: ethernet@30000 { compatible = "marvell,armada-3700-neta"; reg = <0x30000 0x4000>; interrupts = ; clocks = <&sb_periph_clk 8>; status = "disabled"; }; mdio: mdio@32004 { #address-cells = <1>; #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x32004 0x4>; }; eth1: ethernet@40000 { compatible = "marvell,armada-3700-neta"; reg = <0x40000 0x4000>; interrupts = ; clocks = <&sb_periph_clk 7>; status = "disabled"; }; usb3: usb@58000 { compatible = "marvell,armada3700-xhci", "generic-xhci"; reg = <0x58000 0x4000>; interrupts = ; clocks = <&sb_periph_clk 12>; status = "disabled"; }; usb2: usb@5e000 { compatible = "marvell,armada-3700-ehci"; reg = <0x5e000 0x2000>; interrupts = ; status = "disabled"; }; xor@60900 { compatible = "marvell,armada-3700-xor"; reg = <0x60900 0x100>, <0x60b00 0x100>; xor10 { interrupts = ; }; xor11 { interrupts = ; }; }; crypto: crypto@90000 { compatible = "inside-secure,safexcel-eip97ies"; reg = <0x90000 0x20000>; interrupts = , , , , , ; interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", "eip"; clocks = <&nb_periph_clk 15>; }; sdhci1: sdhci@d0000 { compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon"; reg = <0xd0000 0x300>, <0x1e808 0x4>; interrupts = ; clocks = <&nb_periph_clk 0>; clock-names = "core"; status = "disabled"; }; sdhci0: sdhci@d8000 { compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon"; reg = <0xd8000 0x300>, <0x17808 0x4>; interrupts = ; clocks = <&nb_periph_clk 0>; clock-names = "core"; status = "disabled"; }; sata: sata@e0000 { compatible = "marvell,armada-3700-ahci"; reg = <0xe0000 0x2000>; interrupts = ; status = "disabled"; }; gic: interrupt-controller@1d00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; interrupt-controller; reg = <0x1d00000 0x10000>, /* GICD */ <0x1d40000 0x40000>, /* GICR */ <0x1d80000 0x2000>, /* GICC */ <0x1d90000 0x2000>, /* GICH */ <0x1da0000 0x20000>; /* GICV */ interrupts = ; }; }; pcie0: pcie@d0070000 { compatible = "marvell,armada-3700-pcie"; device_type = "pci"; status = "disabled"; reg = <0 0xd0070000 0 0x20000>; #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; interrupts = ; #interrupt-cells = <1>; msi-parent = <&pcie0>; msi-controller; ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x1000000 /* Port 0 MEM */ 0x81000000 0 0xe9000000 0 0xe9000000 0 0x10000>; /* Port 0 IO*/ interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc 0>, <0 0 0 2 &pcie_intc 1>, <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; pcie_intc: interrupt-controller { interrupt-controller; #interrupt-cells = <1>; }; }; }; };