/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2021 MediaTek Inc.
*/

&main_pmic {
	compatible = "mediatek,mt6358-pmic";
	interrupt-controller;
	#interrupt-cells = <2>;
	mediatek,num-pmic-irqs = <145>;
	mediatek,pmic-irqs =
			<INT_VPROC11_OC SP_BUCK>,
			<INT_VPROC12_OC SP_BUCK>,
			<INT_VCORE_OC SP_BUCK>,
			<INT_VGPU_OC SP_BUCK>,
			<INT_VMODEM_OC SP_BUCK>,
			<INT_VDRAM1_OC SP_BUCK>,
			<INT_VS1_OC SP_BUCK>,
			<INT_VS2_OC SP_BUCK>,
			<INT_VPA_OC SP_BUCK>,
			<INT_VCORE_PREOC SP_BUCK>,
			<INT_VFE28_OC SP_LDO>,
			<INT_VXO22_OC SP_LDO>,
			<INT_VRF18_OC SP_LDO>,
			<INT_VRF12_OC SP_LDO>,
			<INT_VEFUSE_OC SP_LDO>,
			<INT_VCN33_OC SP_LDO>,
			<INT_VCN28_OC SP_LDO>,
			<INT_VCN18_OC SP_LDO>,
			<INT_VM18_OC SP_LDO>,
			<INT_VMDDR_OC SP_LDO>,
			<INT_VSRAM_CORE_OC SP_LDO>,
			<INT_VA12_OC SP_LDO>,
			<INT_VAUX18_OC SP_LDO>,
			<INT_VAUD28_OC SP_LDO>,
			<INT_VIO28_OC SP_LDO>,
			<INT_VIO18_OC SP_LDO>,
			<INT_VSRAM_PROC11_OC SP_LDO>,
			<INT_VSRAM_PROC12_OC SP_LDO>,
			<INT_VSRAM_OTHERS_OC SP_LDO>,
			<INT_VSRAM_GPU_OC SP_LDO>,
			<INT_VDRAM2_OC SP_LDO>,
			<INT_VMC_OC SP_LDO>,
			<INT_VMCH_OC SP_LDO>,
			<INT_VEMC_OC SP_LDO>,
			<INT_VSIM1_OC SP_LDO>,
			<INT_VSIM2_OC SP_LDO>,
			<INT_VIBR_OC SP_LDO>,
			<INT_VUSB_OC SP_LDO>,
			<INT_VBIF28_OC SP_LDO>,
			<INT_PWRKEY SP_PSC>,
			<INT_HOMEKEY SP_PSC>,
			<INT_PWRKEY_R SP_PSC>,
			<INT_HOMEKEY_R SP_PSC>,
			<INT_NI_LBAT_INT SP_PSC>,
			<INT_CHRDET SP_PSC>,
			<INT_CHRDET_EDGE SP_PSC>,
			<INT_VCDT_HV_DET SP_PSC>,
			<INT_RTC SP_SCK>,
			<INT_FG_BAT0_H SP_BM>,
			<INT_FG_BAT0_L SP_BM>,
			<INT_FG_CUR_H SP_BM>,
			<INT_FG_CUR_L SP_BM>,
			<INT_FG_ZCV SP_BM>,
			<INT_FG_BAT1_H SP_BM>,
			<INT_FG_BAT1_L SP_BM>,
			<INT_FG_N_CHARGE_L SP_BM>,
			<INT_FG_IAVG_H SP_BM>,
			<INT_FG_IAVG_L SP_BM>,
			<INT_FG_TIME_H SP_BM>,
			<INT_FG_DISCHARGE SP_BM>,
			<INT_FG_CHARGE SP_BM>,
			<INT_BATON_LV SP_BM>,
			<INT_BATON_HT SP_BM>,
			<INT_BATON_BAT_IN SP_BM>,
			<INT_BATON_BAT_OUT SP_BM>,
			<INT_BIF SP_BM>,
			<INT_BAT_H SP_HK>,
			<INT_BAT_L SP_HK>,
			<INT_BAT2_H SP_HK>,
			<INT_BAT2_L SP_HK>,
			<INT_BAT_TEMP_H SP_HK>,
			<INT_BAT_TEMP_L SP_HK>,
			<INT_AUXADC_IMP SP_HK>,
			<INT_NAG_C_DLTV SP_HK>,
			<INT_AUDIO SP_AUD>,
			<INT_ACCDET SP_AUD>,
			<INT_ACCDET_EINT0 SP_AUD>,
			<INT_ACCDET_EINT1 SP_AUD>,
			<INT_SPI_CMD_ALERT SP_MISC>;
	interrupt-names =
			"vproc11_oc",
			"vproc12_oc",
			"vcore_oc",
			"vgpu_oc",
			"vmodem_oc",
			"vdram1_oc",
			"vs1_oc",
			"vs2_oc",
			"vpa_oc",
			"vcore_preoc",
			"vfe28_oc",
			"vxo22_oc",
			"vrf18_oc",
			"vrf12_oc",
			"vefuse_oc",
			"vcn33_oc",
			"vcn28_oc",
			"vcn18_oc",
			"vm18_oc",
			"vmddr_oc",
			"vsram_core_oc",
			"va12_oc",
			"vaux18_oc",
			"vaud28_oc",
			"vio28_oc",
			"vio18_oc",
			"vsram_proc11_oc",
			"vsram_proc12_oc",
			"vsram_others_oc",
			"vsram_gpu_oc",
			"vdram2_oc",
			"vmc_oc",
			"vmch_oc",
			"vemc_oc",
			"vsim1_oc",
			"vsim2_oc",
			"vibr_oc",
			"vusb_oc",
			"vbif28_oc",
			"pwrkey",
			"homekey",
			"pwrkey_r",
			"homekey_r",
			"ni_lbat_int",
			"chrdet",
			"chrdet_edge",
			"vcdt_hv_det",
			"rtc",
			"fg_bat0_h",
			"fg_bat0_l",
			"fg_cur_h",
			"fg_cur_l",
			"fg_zcv",
			"fg_bat1_h",
			"fg_bat1_l",
			"fg_n_charge_l",
			"fg_iavg_h",
			"fg_iavg_l",
			"fg_time_h",
			"fg_discharge",
			"fg_charge",
			"baton_lv",
			"baton_ht",
			"baton_bat_in",
			"baton_bat_out",
			"bif",
			"bat_h",
			"bat_l",
			"bat2_h",
			"bat2_l",
			"bat_temp_h",
			"bat_temp_l",
			"auxadc_imp",
			"nag_c_dltv",
			"audio",
			"accdet",
			"accdet_eint0",
			"accdet_eint1",
			"spi_cmd_alert";

	pmic: mt-pmic {
		compatible = "mediatek,mt-pmic";
		interrupts = <INT_PWRKEY IRQ_TYPE_LEVEL_HIGH>,
			     <INT_PWRKEY_R IRQ_TYPE_LEVEL_HIGH>,
			     <INT_HOMEKEY IRQ_TYPE_LEVEL_HIGH>,
			     <INT_HOMEKEY_R IRQ_TYPE_LEVEL_HIGH>,
			     <INT_BAT_H IRQ_TYPE_LEVEL_HIGH>,
			     <INT_BAT_L IRQ_TYPE_LEVEL_HIGH>,
			     <INT_FG_CUR_H IRQ_TYPE_LEVEL_HIGH>,
			     <INT_FG_CUR_L IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "pwrkey",
				  "pwrkey_r",
				  "homekey",
				  "homekey_r",
				  "bat_h",
				  "bat_l",
				  "fg_cur_h",
				  "fg_cur_l";
		/* WK for power plan change */
		pmic,init_gpio = <&pio 200 0x0>;
	};

	pmic_auxadc: mt635x-auxadc {
		compatible = "mediatek,mt6358-auxadc";
		#io-channel-cells = <1>;
		/* efuse offset from mt6358 */
		cali-efuse-offset = <1>;

		batadc {
			channel = <AUXADC_BATADC>;
			resistance-ratio = <3 1>;
			avg-num = <128>;
		};
		vcdt {
			channel = <AUXADC_VCDT>;
		};
		bat_temp {
			channel = <AUXADC_BAT_TEMP>;
			resistance-ratio = <2 1>;
		};
		chip_temp {
			channel = <AUXADC_CHIP_TEMP>;
		};
		vcore_temp {
			channel = <AUXADC_VCORE_TEMP>;
		};
		vproc_temp {
			channel = <AUXADC_VPROC_TEMP>;
		};
		vgpu_temp {
			channel = <AUXADC_VGPU_TEMP>;
		};
		accdet {
			channel = <AUXADC_ACCDET>;
		};
		dcxo_volt {
			channel = <AUXADC_VDCXO>;
			resistance-ratio = <3 2>;
		};
		tsx_temp {
			channel = <AUXADC_TSX_TEMP>;
			avg-num = <128>;
		};
		hpofs_cal {
			channel = <AUXADC_HPOFS_CAL>;
			avg-num = <256>;
		};
		dcxo_temp {
			channel = <AUXADC_DCXO_TEMP>;
			avg-num = <16>;
		};
		vbif {
			channel = <AUXADC_VBIF>;
			resistance-ratio = <2 1>;
		};
	};

	mt6358regulator: mt6358regulator {
		compatible = "mediatek,mt6358-regulator";
		interrupts =
			<INT_VPROC11_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VPROC12_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VCORE_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VGPU_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VMODEM_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VDRAM1_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VS1_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VS2_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VPA_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VFE28_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VXO22_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VRF18_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VRF12_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VEFUSE_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VCN33_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VCN28_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VCN18_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VM18_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VMDDR_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSRAM_CORE_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VA12_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VAUX18_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VAUD28_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VIO28_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VIO18_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSRAM_PROC11_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSRAM_PROC12_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSRAM_OTHERS_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSRAM_GPU_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VDRAM2_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VMC_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VMCH_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VEMC_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSIM1_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VSIM2_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VIBR_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VUSB_OC IRQ_TYPE_LEVEL_HIGH>,
			<INT_VBIF28_OC IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names =
			"VPROC11",
			"VPROC12",
			"VCORE",
			"VGPU",
			"VMODEM",
			"VDRAM1",
			"VS1",
			"VS2",
			"VPA",
			"VFE28",
			"VXO22",
			"VRF18",
			"VRF12",
			"VEFUSE",
			"VCN33_BT",
			"VCN28",
			"VCN18",
			"VM18",
			"VMDDR",
			"VSRAM_CORE",
			"VA12",
			"VAUX18",
			"VAUD28",
			"VIO28",
			"VIO18",
			"VSRAM_PROC11",
			"VSRAM_PROC12",
			"VSRAM_OTHERS",
			"VSRAM_GPU",
			"VDRAM2",
			"VMC",
			"VMCH",
			"VEMC",
			"VSIM1",
			"VSIM2",
			"VIBR",
			"VUSB",
			"VBIF28";
		mt_pmic_vdram1_buck_reg: buck_vdram1 {
			regulator-name = "vdram1";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <2087500>;
			regulator-enable-ramp-delay = <0>;
		};
		mt_pmic_vcore_buck_reg: buck_vcore {
			regulator-name = "vcore";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <200>;
		};
		mt_pmic_vpa_buck_reg: buck_vpa {
			regulator-name = "vpa";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <3650000>;
			regulator-enable-ramp-delay = <250>;
		};
		mt_pmic_vproc11_buck_reg: buck_vproc11 {
			regulator-name = "vproc11";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <200>;
		};
		mt_pmic_vproc12_buck_reg: buck_vproc12 {
			regulator-name = "vproc12";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <200>;
		};
		mt_pmic_vgpu_buck_reg: buck_vgpu {
			regulator-name = "vgpu";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <200>;
		};
		mt_pmic_vs2_buck_reg: buck_vs2 {
			regulator-name = "vs2";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <2087500>;
			regulator-enable-ramp-delay = <0>;
		};
		mt_pmic_vmodem_buck_reg: buck_vmodem {
			regulator-name = "vmodem";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <900>;
		};
		mt_pmic_vs1_buck_reg: buck_vs1 {
			regulator-name = "vs1";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <2587500>;
			regulator-enable-ramp-delay = <0>;
		};

		mt_pmic_vdram2_ldo_reg: ldo_vdram2 {
			regulator-name = "vdram2";
			regulator-min-microvolt = <600000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <3300>;
		};
		mt_pmic_vsim1_ldo_reg: ldo_vsim1 {
			regulator-name = "vsim1";
			regulator-min-microvolt = <1700000>;
			regulator-max-microvolt = <3100000>;
			regulator-enable-ramp-delay = <540>;
		};
		mt_pmic_vibr_ldo_reg: ldo_vibr {
			regulator-name = "vibr";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <3300000>;
			regulator-enable-ramp-delay = <60>;
		};
		mt_pmic_vrf12_ldo_reg: ldo_vrf12 {
			regulator-name = "vrf12";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			regulator-enable-ramp-delay = <120>;
		};
		mt_pmic_vio18_ldo_reg: ldo_vio18 {
			regulator-name = "vio18";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <2700>;
			regulator-always-on;
		};
		mt_pmic_vusb_ldo_reg: ldo_vusb {
			regulator-name = "vusb";
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3100000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vcn18_ldo_reg: ldo_vcn18 {
			regulator-name = "vcn18";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vfe28_ldo_reg: ldo_vfe28 {
			regulator-name = "vfe28";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vsram_proc11_ldo_reg: ldo_vsram_proc11 {
			regulator-name = "vsram_proc11";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <240>;
		};
		mt_pmic_vcn28_ldo_reg: ldo_vcn28 {
			regulator-name = "vcn28";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vsram_core_ldo_reg: ldo_vsram_core {
			regulator-name = "vsram_core";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <240>;
		};
		mt_pmic_vsram_others_ldo_reg: ldo_vsram_others {
			regulator-name = "vsram_others";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <240>;
		};
		mt_pmic_vsram_gpu_ldo_reg: ldo_vsram_gpu {
			regulator-name = "vsram_gpu";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <240>;
		};
		mt_pmic_vxo22_ldo_reg: ldo_vxo22 {
			regulator-name = "vxo22";
			regulator-min-microvolt = <2200000>;
			regulator-max-microvolt = <2200000>;
			regulator-enable-ramp-delay = <120>;
		};
		mt_pmic_vefuse_ldo_reg: ldo_vefuse {
			regulator-name = "vefuse";
			regulator-min-microvolt = <1700000>;
			regulator-max-microvolt = <1900000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vaux18_ldo_reg: ldo_vaux18 {
			regulator-name = "vaux18";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vmch_ldo_reg: ldo_vmch {
			regulator-name = "vmch";
			regulator-min-microvolt = <2900000>;
			regulator-max-microvolt = <3300000>;
			regulator-enable-ramp-delay = <60>;
		};
		mt_pmic_vbif28_ldo_reg: ldo_vbif28 {
			regulator-name = "vbif28";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vsram_proc12_ldo_reg: ldo_vsram_proc12 {
			regulator-name = "vsram_proc12";
			regulator-min-microvolt = <500000>;
			regulator-max-microvolt = <1293750>;
			regulator-enable-ramp-delay = <240>;
		};
		mt_pmic_vemc_ldo_reg: ldo_vemc {
			regulator-name = "vemc";
			regulator-min-microvolt = <2900000>;
			regulator-max-microvolt = <3300000>;
			regulator-enable-ramp-delay = <60>;
		};
		mt_pmic_vio28_ldo_reg: ldo_vio28 {
			regulator-name = "vio28";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_va12_ldo_reg: ldo_va12 {
			regulator-name = "va12";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			regulator-enable-ramp-delay = <270>;
			regulator-always-on;
		};
		mt_pmic_vrf18_ldo_reg: ldo_vrf18 {
			regulator-name = "vrf18";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <120>;
		};
		mt_pmic_vcn33_bt_ldo_reg: ldo_vcn33_bt {
			regulator-name = "vcn33_bt";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3500000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vcn33_wifi_ldo_reg: ldo_vcn33_wifi {
			regulator-name = "vcn33_wifi";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3500000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vmc_ldo_reg: ldo_vmc {
			regulator-name = "vmc";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-enable-ramp-delay = <60>;
		};
		mt_pmic_vaud28_ldo_reg: ldo_vaud28 {
			regulator-name = "vaud28";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <2800000>;
			regulator-enable-ramp-delay = <270>;
		};
		mt_pmic_vsim2_ldo_reg: ldo_vsim2 {
			regulator-name = "vsim2";
			regulator-min-microvolt = <1700000>;
			regulator-max-microvolt = <3100000>;
			regulator-enable-ramp-delay = <540>;
		};
		mt_pmic_va09_ldo_reg: ldo_va09 {
			regulator-name = "va09";
			regulator-min-microvolt = <900000>;
			regulator-max-microvolt = <900000>;
			regulator-enable-ramp-delay = <264>;
			regulator-boot-on;
		};
	};	/* End of mt6358regulator */
	mt6358_rtc: mt6358_rtc {
		compatible = "mediatek,mt6358-rtc";
		bootmode = <&chosen>;
		interrupts = <INT_RTC IRQ_TYPE_NONE>;
		interrupt-names = "rtc";
		base = <0x580>;
	};
	mt6358_misc: mt6358_misc {
		compatible = "mediatek,mt6358-misc";
		base = <0x580>;
		dcxo-switch;
	};
};/* End of main_pmic */