35 lines
1.5 KiB
Plaintext
35 lines
1.5 KiB
Plaintext
Amlogic meson GPIO interrupt controller
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Meson SoCs contains an interrupt controller which is able to watch the SoC
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pads and generate an interrupt on edge or level. The controller is essentially
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a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
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or level and polarity. It does not expose all 256 mux inputs because the
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documentation shows that the upper part is not mapped to any pad. The actual
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number of interrupt exposed depends on the SoC.
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Required properties:
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- compatible : must have "amlogic,meson8-gpio-intc" and either
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"amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or
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"amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or
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"amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or
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"amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)
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"amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)
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- reg : Specifies base physical address and size of the registers.
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt source. The value must be 2.
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- meson,channel-interrupts: Array with the 8 upstream hwirq numbers. These
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are the hwirqs used on the parent interrupt controller.
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Example:
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gpio_interrupt: interrupt-controller@9880 {
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compatible = "amlogic,meson-gxbb-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x9880 0x0 0x10>;
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interrupt-controller;
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#interrupt-cells = <2>;
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meson,channel-interrupts = <64 65 66 67 68 69 70 71>;
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};
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