125 lines
4.1 KiB
Plaintext
125 lines
4.1 KiB
Plaintext
TI SoC Ethernet Switch Controller Device Tree Bindings
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------------------------------------------------------
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Required properties:
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- compatible : Should be one of the below:-
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"ti,cpsw" for backward compatible
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"ti,am335x-cpsw" for AM335x controllers
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"ti,am4372-cpsw" for AM437x controllers
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"ti,dra7-cpsw" for DRA7x controllers
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- reg : physical base address and size of the cpsw
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registers map
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- interrupts : property with a value describing the interrupt
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number
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- cpdma_channels : Specifies number of channels in CPDMA
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- ale_entries : Specifies No of entries ALE can hold
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- bd_ram_size : Specifies internal descriptor RAM size
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- mac_control : Specifies Default MAC control register content
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for the specific platform
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- slaves : Specifies number for slaves
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- active_slave : Specifies the slave to use for time stamping,
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ethtool and SIOCGMIIPHY
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- cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
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device. See also cpsw-phy-sel.txt for it's binding.
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Note that in legacy cases cpsw-phy-sel may be
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a child device instead of a phandle.
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Optional properties:
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- ti,hwmods : Must be "cpgmac0"
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- dual_emac : Specifies Switch to act as Dual EMAC
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- syscon : Phandle to the system control device node, which is
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the control module device of the am33x
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- mode-gpios : Should be added if one/multiple gpio lines are
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required to be driven so that cpsw data lines
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can be connected to the phy via selective mux.
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For example in dra72x-evm, pcf gpio has to be
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driven low so that cpsw slave 0 and phy data
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lines are connected via mux.
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- cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds
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- cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds
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Mult and shift will be calculated basing on CPTS
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rftclk frequency if both cpts_clock_shift and
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cpts_clock_mult properties are not provided.
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Slave Properties:
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Required properties:
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- phy-mode : See ethernet.txt file in the same directory
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Optional properties:
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- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
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- mac-address : See ethernet.txt file in the same directory
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- phy_id : Specifies slave phy id (deprecated, use phy-handle)
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- phy-handle : See ethernet.txt file in the same directory
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Slave sub-nodes:
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- fixed-link : See fixed-link.txt file in the same directory
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Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified.
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Note: "ti,hwmods" field is used to fetch the base address and irq
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resources from TI, omap hwmod data base during device registration.
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Future plan is to migrate hwmod data base contents into device tree
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blob so that, all the required data will be used from device tree dts
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file.
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Examples:
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mac: ethernet@4a100000 {
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compatible = "ti,cpsw";
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reg = <0x4A100000 0x1000>;
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interrupts = <55 0x4>;
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interrupt-parent = <&intc>;
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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syscon = <&cm>;
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cpsw-phy-sel = <&phy_sel>;
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cpsw_emac0: slave@0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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(or)
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mac: ethernet@4a100000 {
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compatible = "ti,cpsw";
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ti,hwmods = "cpgmac0";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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syscon = <&cm>;
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cpsw-phy-sel = <&phy_sel>;
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cpsw_emac0: slave@0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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