124 lines
3 KiB
Plaintext
124 lines
3 KiB
Plaintext
Broadcom iProc GPIO/PINCONF Controller
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Required properties:
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- compatible:
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"brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
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supports full-featured pinctrl and GPIO functions used in various iProc
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based SoCs
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May contain an SoC-specific compatibility string to accommodate any
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SoC-specific features
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"brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
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"brcm,cygnus-crmu-gpio" for Cygnus SoCs
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"brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
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disabled
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"brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
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pinctrl support completely disabled in this IP block. In Stingray, a
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different IP block is used to handle pinctrl related functions
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- reg:
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Define the base and range of the I/O address space that contains SoC
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GPIO/PINCONF controller registers
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- ngpios:
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Total number of in-use slots in GPIO controller
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- #gpio-cells:
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Must be two. The first cell is the GPIO pin number (within the
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controller's pin space) and the second cell is used for the following:
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bit[0]: polarity (0 for active high and 1 for active low)
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- gpio-controller:
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Specifies that the node is a GPIO controller
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Optional properties:
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- interrupts:
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Interrupt ID
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- interrupt-controller:
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Specifies that the node is an interrupt controller
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- gpio-ranges:
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Specifies the mapping between gpio controller and pin-controllers pins.
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This requires 4 fields in cells defined as -
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1. Phandle of pin-controller.
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2. GPIO base pin offset.
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3 Pin-control base pin offset.
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4. number of gpio pins which are linearly mapped from pin base.
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Supported generic PINCONF properties in child nodes:
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- pins:
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The list of pins (within the controller's own pin space) that properties
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in the node apply to. Pin names are "gpio-<pin>"
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- bias-disable:
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Disable pin bias
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- bias-pull-up:
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Enable internal pull up resistor
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- bias-pull-down:
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Enable internal pull down resistor
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- drive-strength:
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Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
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Example:
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gpio_ccm: gpio@1800a000 {
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compatible = "brcm,cygnus-ccm-gpio";
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reg = <0x1800a000 0x50>,
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<0x0301d164 0x20>;
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ngpios = <24>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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touch_pins: touch_pins {
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pwr: pwr {
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pins = "gpio-0";
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drive-strength = <16>;
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};
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event: event {
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pins = "gpio-1";
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bias-pull-up;
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};
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};
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};
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gpio_asiu: gpio@180a5000 {
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compatible = "brcm,cygnus-asiu-gpio";
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reg = <0x180a5000 0x668>;
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ngpios = <146>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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gpio-ranges = <&pinctrl 0 42 1>,
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<&pinctrl 1 44 3>;
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};
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/*
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* Touchscreen that uses the CCM GPIO 0 and 1
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*/
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tsc {
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...
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...
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gpio-pwr = <&gpio_ccm 0 0>;
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gpio-event = <&gpio_ccm 1 0>;
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};
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/* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
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bluetooth {
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...
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...
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bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
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}
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