82 lines
3.9 KiB
Plaintext
82 lines
3.9 KiB
Plaintext
Linux I2C fault injection
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=========================
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The GPIO based I2C bus master driver can be configured to provide fault
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injection capabilities. It is then meant to be connected to another I2C bus
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which is driven by the I2C bus master driver under test. The GPIO fault
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injection driver can create special states on the bus which the other I2C bus
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master driver should handle gracefully.
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Once the Kconfig option I2C_GPIO_FAULT_INJECTOR is enabled, there will be an
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'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
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mounted at /sys/kernel/debug. There will be a separate subdirectory per GPIO
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driven I2C bus. Each subdirectory will contain files to trigger the fault
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injection. They will be described now along with their intended use-cases.
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"scl"
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-----
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By reading this file, you get the current state of SCL. By writing, you can
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change its state to either force it low or to release it again. So, by using
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"echo 0 > scl" you force SCL low and thus, no communication will be possible
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because the bus master under test will not be able to clock. It should detect
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the condition of SCL being unresponsive and report an error to the upper
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layers.
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"sda"
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-----
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By reading this file, you get the current state of SDA. By writing, you can
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change its state to either force it low or to release it again. So, by using
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"echo 0 > sda" you force SDA low and thus, data cannot be transmitted. The bus
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master under test should detect this condition and trigger a bus recovery (see
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I2C specification version 4, section 3.1.16) using the helpers of the Linux I2C
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core (see 'struct bus_recovery_info'). However, the bus recovery will not
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succeed because SDA is still pinned low until you manually release it again
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with "echo 1 > sda". A test with an automatic release can be done with the
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following class of fault injectors.
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Introduction to incomplete transfers
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------------------------------------
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The following fault injectors create situations where SDA will be held low by a
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device. Bus recovery should be able to fix these situations. But please note:
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there are I2C client devices which detect a stuck SDA on their side and release
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it on their own after a few milliseconds. Also, there might be an external
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device deglitching and monitoring the I2C bus. It could also detect a stuck SDA
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and will init a bus recovery on its own. If you want to implement bus recovery
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in a bus master driver, make sure you checked your hardware setup for such
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devices before. And always verify with a scope or logic analyzer!
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"incomplete_address_phase"
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--------------------------
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This file is write only and you need to write the address of an existing I2C
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client device to it. Then, a read transfer to this device will be started, but
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it will stop at the ACK phase after the address of the client has been
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transmitted. Because the device will ACK its presence, this results in SDA
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being pulled low by the device while SCL is high. So, similar to the "sda" file
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above, the bus master under test should detect this condition and try a bus
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recovery. This time, however, it should succeed and the device should release
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SDA after toggling SCL.
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"incomplete_write_byte"
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-----------------------
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Similar to above, this file is write only and you need to write the address of
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an existing I2C client device to it.
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The injector will again stop at one ACK phase, so the device will keep SDA low
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because it acknowledges data. However, there are two differences compared to
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'incomplete_address_phase':
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a) the message sent out will be a write message
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b) after the address byte, a 0x00 byte will be transferred. Then, stop at ACK.
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This is a highly delicate state, the device is set up to write any data to
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register 0x00 (if it has registers) when further clock pulses happen on SCL.
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This is why bus recovery (up to 9 clock pulses) must either check SDA or send
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additional STOP conditions to ensure the bus has been released. Otherwise
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random data will be written to a device!
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