224 lines
6.2 KiB
C
224 lines
6.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ahennessy@mvista.com
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*
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* Copyright (C) 2000-2001 Toshiba Corporation
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* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <asm/reboot.h>
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#include <asm/txx9pio.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/pci.h>
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#include <asm/txx9/jmr3927.h>
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#include <asm/mipsregs.h>
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static void jmr3927_machine_restart(char *command)
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{
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local_irq_disable();
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#if 1 /* Resetting PCI bus */
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jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
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jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
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(void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
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mdelay(1);
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jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
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#endif
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jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
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/* fallback */
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(*_machine_halt)();
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}
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static void __init jmr3927_time_init(void)
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{
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tx3927_time_init(0, 1);
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}
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#define DO_WRITE_THROUGH
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static void jmr3927_board_init(void);
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static void __init jmr3927_mem_setup(void)
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{
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set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
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_machine_restart = jmr3927_machine_restart;
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/* cache setup */
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{
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unsigned int conf;
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#ifdef DO_WRITE_THROUGH
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int mips_config_cwfon = 0;
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int mips_config_wbon = 0;
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#else
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int mips_config_cwfon = 1;
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int mips_config_wbon = 1;
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#endif
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conf = read_c0_conf();
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conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
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conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
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conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
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write_c0_conf(conf);
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write_c0_cache(0);
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}
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/* initialize board */
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jmr3927_board_init();
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tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
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}
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static void __init jmr3927_pci_setup(void)
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{
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#ifdef CONFIG_PCI
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int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
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struct pci_controller *c;
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c = txx9_alloc_pci_controller(&txx9_primary_pcic,
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JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
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JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
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register_pci_controller(c);
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if (!extarb) {
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/* Reset PCI Bus */
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jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
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udelay(100);
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jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
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JMR3927_IOC_RESET_ADDR);
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udelay(100);
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jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
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}
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tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
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tx3927_setup_pcierr_irq();
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#endif /* CONFIG_PCI */
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}
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static void __init jmr3927_board_init(void)
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{
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txx9_cpu_clock = JMR3927_CORECLK;
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/* SDRAMC are configured by PROM */
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/* ROMC */
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tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
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tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
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tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
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tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
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/* Pin selection */
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tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
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tx3927_ccfgptr->pcfg |=
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TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
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(TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
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tx3927_setup();
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/* PIO[15:12] connected to LEDs */
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__raw_writel(0x0000f000, &tx3927_pioptr->dir);
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jmr3927_pci_setup();
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/* SIO0 DTR on */
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jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
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jmr3927_led_set(0);
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pr_info("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
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jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
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jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
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jmr3927_dipsw1(), jmr3927_dipsw2(),
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jmr3927_dipsw3(), jmr3927_dipsw4());
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}
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/* This trick makes rtc-ds1742 driver usable as is. */
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static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
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{
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if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
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return port;
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port = (port & 0xffff0000) | (port & 0x7fff << 1);
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#ifdef __BIG_ENDIAN
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return port;
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#else
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return port | 1;
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#endif
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}
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static void __init jmr3927_rtc_init(void)
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{
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static struct resource __initdata res = {
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.start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
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.end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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};
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platform_device_register_simple("rtc-ds1742", -1, &res, 1);
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}
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static void __init jmr3927_mtd_init(void)
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{
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int i;
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for (i = 0; i < 2; i++)
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tx3927_mtd_init(i);
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}
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static void __init jmr3927_device_init(void)
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{
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unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
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#ifdef __LITTLE_ENDIAN
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iocled_base |= 1;
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#endif
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__swizzle_addr_b = jmr3927_swizzle_addr_b;
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jmr3927_rtc_init();
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tx3927_wdt_init();
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jmr3927_mtd_init();
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txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
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}
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static void __init jmr3927_arch_init(void)
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{
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txx9_gpio_init(TX3927_PIO_REG, 0, 16);
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gpio_request(11, "dipsw1");
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gpio_request(10, "dipsw2");
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}
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struct txx9_board_vec jmr3927_vec __initdata = {
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.system = "Toshiba JMR_TX3927",
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.prom_init = jmr3927_prom_init,
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.mem_setup = jmr3927_mem_setup,
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.irq_setup = jmr3927_irq_setup,
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.time_init = jmr3927_time_init,
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.device_init = jmr3927_device_init,
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.arch_init = jmr3927_arch_init,
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#ifdef CONFIG_PCI
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.pci_map_irq = jmr3927_pci_map_irq,
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#endif
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};
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