634 lines
17 KiB
C
634 lines
17 KiB
C
/*
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* Machine check exception handling.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright 2013 IBM Corporation
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* Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
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*/
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#undef DEBUG
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#define pr_fmt(fmt) "mce: " fmt
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#include <linux/hardirq.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/percpu.h>
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#include <linux/export.h>
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#include <linux/irq_work.h>
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#include <asm/machdep.h>
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#include <asm/mce.h>
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static DEFINE_PER_CPU(int, mce_nest_count);
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static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event);
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/* Queue for delayed MCE events. */
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static DEFINE_PER_CPU(int, mce_queue_count);
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static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event_queue);
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/* Queue for delayed MCE UE events. */
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static DEFINE_PER_CPU(int, mce_ue_count);
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static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT],
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mce_ue_event_queue);
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static void machine_check_process_queued_event(struct irq_work *work);
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static void machine_check_ue_irq_work(struct irq_work *work);
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void machine_check_ue_event(struct machine_check_event *evt);
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static void machine_process_ue_event(struct work_struct *work);
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static struct irq_work mce_event_process_work = {
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.func = machine_check_process_queued_event,
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};
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static struct irq_work mce_ue_event_irq_work = {
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.func = machine_check_ue_irq_work,
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};
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DECLARE_WORK(mce_ue_event_work, machine_process_ue_event);
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static void mce_set_error_info(struct machine_check_event *mce,
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struct mce_error_info *mce_err)
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{
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mce->error_type = mce_err->error_type;
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switch (mce_err->error_type) {
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case MCE_ERROR_TYPE_UE:
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mce->u.ue_error.ue_error_type = mce_err->u.ue_error_type;
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break;
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case MCE_ERROR_TYPE_SLB:
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mce->u.slb_error.slb_error_type = mce_err->u.slb_error_type;
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break;
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case MCE_ERROR_TYPE_ERAT:
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mce->u.erat_error.erat_error_type = mce_err->u.erat_error_type;
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break;
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case MCE_ERROR_TYPE_TLB:
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mce->u.tlb_error.tlb_error_type = mce_err->u.tlb_error_type;
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break;
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case MCE_ERROR_TYPE_USER:
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mce->u.user_error.user_error_type = mce_err->u.user_error_type;
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break;
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case MCE_ERROR_TYPE_RA:
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mce->u.ra_error.ra_error_type = mce_err->u.ra_error_type;
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break;
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case MCE_ERROR_TYPE_LINK:
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mce->u.link_error.link_error_type = mce_err->u.link_error_type;
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break;
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case MCE_ERROR_TYPE_UNKNOWN:
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default:
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break;
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}
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}
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/*
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* Decode and save high level MCE information into per cpu buffer which
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* is an array of machine_check_event structure.
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*/
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void save_mce_event(struct pt_regs *regs, long handled,
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struct mce_error_info *mce_err,
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uint64_t nip, uint64_t addr, uint64_t phys_addr)
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{
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int index = __this_cpu_inc_return(mce_nest_count) - 1;
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struct machine_check_event *mce = this_cpu_ptr(&mce_event[index]);
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/*
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* Return if we don't have enough space to log mce event.
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* mce_nest_count may go beyond MAX_MC_EVT but that's ok,
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* the check below will stop buffer overrun.
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*/
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if (index >= MAX_MC_EVT)
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return;
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/* Populate generic machine check info */
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mce->version = MCE_V1;
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mce->srr0 = nip;
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mce->srr1 = regs->msr;
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mce->gpr3 = regs->gpr[3];
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mce->in_use = 1;
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/* Mark it recovered if we have handled it and MSR(RI=1). */
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if (handled && (regs->msr & MSR_RI))
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mce->disposition = MCE_DISPOSITION_RECOVERED;
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else
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mce->disposition = MCE_DISPOSITION_NOT_RECOVERED;
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mce->initiator = mce_err->initiator;
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mce->severity = mce_err->severity;
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/*
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* Populate the mce error_type and type-specific error_type.
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*/
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mce_set_error_info(mce, mce_err);
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if (!addr)
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return;
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if (mce->error_type == MCE_ERROR_TYPE_TLB) {
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mce->u.tlb_error.effective_address_provided = true;
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mce->u.tlb_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_SLB) {
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mce->u.slb_error.effective_address_provided = true;
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mce->u.slb_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_ERAT) {
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mce->u.erat_error.effective_address_provided = true;
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mce->u.erat_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_USER) {
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mce->u.user_error.effective_address_provided = true;
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mce->u.user_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_RA) {
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mce->u.ra_error.effective_address_provided = true;
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mce->u.ra_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_LINK) {
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mce->u.link_error.effective_address_provided = true;
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mce->u.link_error.effective_address = addr;
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} else if (mce->error_type == MCE_ERROR_TYPE_UE) {
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mce->u.ue_error.effective_address_provided = true;
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mce->u.ue_error.effective_address = addr;
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if (phys_addr != ULONG_MAX) {
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mce->u.ue_error.physical_address_provided = true;
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mce->u.ue_error.physical_address = phys_addr;
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machine_check_ue_event(mce);
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}
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}
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return;
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}
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/*
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* get_mce_event:
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* mce Pointer to machine_check_event structure to be filled.
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* release Flag to indicate whether to free the event slot or not.
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* 0 <= do not release the mce event. Caller will invoke
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* release_mce_event() once event has been consumed.
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* 1 <= release the slot.
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*
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* return 1 = success
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* 0 = failure
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*
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* get_mce_event() will be called by platform specific machine check
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* handle routine and in KVM.
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* When we call get_mce_event(), we are still in interrupt context and
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* preemption will not be scheduled until ret_from_expect() routine
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* is called.
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*/
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int get_mce_event(struct machine_check_event *mce, bool release)
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{
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int index = __this_cpu_read(mce_nest_count) - 1;
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struct machine_check_event *mc_evt;
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int ret = 0;
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/* Sanity check */
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if (index < 0)
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return ret;
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/* Check if we have MCE info to process. */
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if (index < MAX_MC_EVT) {
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mc_evt = this_cpu_ptr(&mce_event[index]);
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/* Copy the event structure and release the original */
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if (mce)
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*mce = *mc_evt;
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if (release)
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mc_evt->in_use = 0;
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ret = 1;
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}
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/* Decrement the count to free the slot. */
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if (release)
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__this_cpu_dec(mce_nest_count);
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return ret;
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}
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void release_mce_event(void)
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{
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get_mce_event(NULL, true);
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}
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static void machine_check_ue_irq_work(struct irq_work *work)
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{
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schedule_work(&mce_ue_event_work);
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}
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/*
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* Queue up the MCE event which then can be handled later.
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*/
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void machine_check_ue_event(struct machine_check_event *evt)
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{
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int index;
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index = __this_cpu_inc_return(mce_ue_count) - 1;
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/* If queue is full, just return for now. */
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if (index >= MAX_MC_EVT) {
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__this_cpu_dec(mce_ue_count);
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return;
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}
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memcpy(this_cpu_ptr(&mce_ue_event_queue[index]), evt, sizeof(*evt));
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/* Queue work to process this event later. */
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irq_work_queue(&mce_ue_event_irq_work);
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}
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/*
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* Queue up the MCE event which then can be handled later.
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*/
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void machine_check_queue_event(void)
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{
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int index;
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struct machine_check_event evt;
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if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
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return;
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index = __this_cpu_inc_return(mce_queue_count) - 1;
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/* If queue is full, just return for now. */
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if (index >= MAX_MC_EVT) {
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__this_cpu_dec(mce_queue_count);
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return;
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}
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memcpy(this_cpu_ptr(&mce_event_queue[index]), &evt, sizeof(evt));
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/* Queue irq work to process this event later. */
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irq_work_queue(&mce_event_process_work);
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}
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/*
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* process pending MCE event from the mce event queue. This function will be
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* called during syscall exit.
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*/
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static void machine_process_ue_event(struct work_struct *work)
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{
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int index;
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struct machine_check_event *evt;
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while (__this_cpu_read(mce_ue_count) > 0) {
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index = __this_cpu_read(mce_ue_count) - 1;
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evt = this_cpu_ptr(&mce_ue_event_queue[index]);
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#ifdef CONFIG_MEMORY_FAILURE
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/*
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* This should probably queued elsewhere, but
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* oh! well
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*/
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if (evt->error_type == MCE_ERROR_TYPE_UE) {
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if (evt->u.ue_error.physical_address_provided) {
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unsigned long pfn;
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pfn = evt->u.ue_error.physical_address >>
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PAGE_SHIFT;
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memory_failure(pfn, 0);
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} else
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pr_warn("Failed to identify bad address from "
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"where the uncorrectable error (UE) "
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"was generated\n");
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}
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#endif
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__this_cpu_dec(mce_ue_count);
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}
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}
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/*
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* process pending MCE event from the mce event queue. This function will be
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* called during syscall exit.
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*/
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static void machine_check_process_queued_event(struct irq_work *work)
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{
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int index;
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struct machine_check_event *evt;
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add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
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/*
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* For now just print it to console.
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* TODO: log this error event to FSP or nvram.
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*/
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while (__this_cpu_read(mce_queue_count) > 0) {
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index = __this_cpu_read(mce_queue_count) - 1;
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evt = this_cpu_ptr(&mce_event_queue[index]);
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machine_check_print_event_info(evt, false);
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__this_cpu_dec(mce_queue_count);
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}
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}
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void machine_check_print_event_info(struct machine_check_event *evt,
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bool user_mode)
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{
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const char *level, *sevstr, *subtype;
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static const char *mc_ue_types[] = {
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"Indeterminate",
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"Instruction fetch",
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"Page table walk ifetch",
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"Load/Store",
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"Page table walk Load/Store",
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};
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static const char *mc_slb_types[] = {
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"Indeterminate",
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"Parity",
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"Multihit",
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};
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static const char *mc_erat_types[] = {
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"Indeterminate",
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"Parity",
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"Multihit",
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};
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static const char *mc_tlb_types[] = {
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"Indeterminate",
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"Parity",
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"Multihit",
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};
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static const char *mc_user_types[] = {
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"Indeterminate",
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"tlbie(l) invalid",
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};
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static const char *mc_ra_types[] = {
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"Indeterminate",
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"Instruction fetch (bad)",
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"Instruction fetch (foreign)",
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"Page table walk ifetch (bad)",
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"Page table walk ifetch (foreign)",
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"Load (bad)",
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"Store (bad)",
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"Page table walk Load/Store (bad)",
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"Page table walk Load/Store (foreign)",
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"Load/Store (foreign)",
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};
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static const char *mc_link_types[] = {
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"Indeterminate",
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"Instruction fetch (timeout)",
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"Page table walk ifetch (timeout)",
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"Load (timeout)",
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"Store (timeout)",
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"Page table walk Load/Store (timeout)",
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};
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/* Print things out */
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if (evt->version != MCE_V1) {
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pr_err("Machine Check Exception, Unknown event version %d !\n",
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evt->version);
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return;
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}
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switch (evt->severity) {
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case MCE_SEV_NO_ERROR:
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level = KERN_INFO;
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sevstr = "Harmless";
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break;
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case MCE_SEV_WARNING:
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level = KERN_WARNING;
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sevstr = "";
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break;
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case MCE_SEV_ERROR_SYNC:
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level = KERN_ERR;
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sevstr = "Severe";
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break;
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case MCE_SEV_FATAL:
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default:
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level = KERN_ERR;
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sevstr = "Fatal";
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break;
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}
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printk("%s%s Machine check interrupt [%s]\n", level, sevstr,
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evt->disposition == MCE_DISPOSITION_RECOVERED ?
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"Recovered" : "Not recovered");
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if (user_mode) {
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printk("%s NIP: [%016llx] PID: %d Comm: %s\n", level,
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evt->srr0, current->pid, current->comm);
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} else {
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printk("%s NIP [%016llx]: %pS\n", level, evt->srr0,
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(void *)evt->srr0);
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}
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printk("%s Initiator: %s\n", level,
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evt->initiator == MCE_INITIATOR_CPU ? "CPU" : "Unknown");
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switch (evt->error_type) {
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case MCE_ERROR_TYPE_UE:
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subtype = evt->u.ue_error.ue_error_type <
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ARRAY_SIZE(mc_ue_types) ?
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mc_ue_types[evt->u.ue_error.ue_error_type]
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: "Unknown";
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printk("%s Error type: UE [%s]\n", level, subtype);
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if (evt->u.ue_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
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level, evt->u.ue_error.effective_address);
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if (evt->u.ue_error.physical_address_provided)
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printk("%s Physical address: %016llx\n",
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level, evt->u.ue_error.physical_address);
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break;
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case MCE_ERROR_TYPE_SLB:
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subtype = evt->u.slb_error.slb_error_type <
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ARRAY_SIZE(mc_slb_types) ?
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mc_slb_types[evt->u.slb_error.slb_error_type]
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: "Unknown";
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printk("%s Error type: SLB [%s]\n", level, subtype);
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if (evt->u.slb_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
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level, evt->u.slb_error.effective_address);
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break;
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case MCE_ERROR_TYPE_ERAT:
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subtype = evt->u.erat_error.erat_error_type <
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ARRAY_SIZE(mc_erat_types) ?
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mc_erat_types[evt->u.erat_error.erat_error_type]
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: "Unknown";
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printk("%s Error type: ERAT [%s]\n", level, subtype);
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if (evt->u.erat_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
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level, evt->u.erat_error.effective_address);
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break;
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case MCE_ERROR_TYPE_TLB:
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subtype = evt->u.tlb_error.tlb_error_type <
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ARRAY_SIZE(mc_tlb_types) ?
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mc_tlb_types[evt->u.tlb_error.tlb_error_type]
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: "Unknown";
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printk("%s Error type: TLB [%s]\n", level, subtype);
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if (evt->u.tlb_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
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level, evt->u.tlb_error.effective_address);
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break;
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case MCE_ERROR_TYPE_USER:
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subtype = evt->u.user_error.user_error_type <
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ARRAY_SIZE(mc_user_types) ?
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mc_user_types[evt->u.user_error.user_error_type]
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: "Unknown";
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printk("%s Error type: User [%s]\n", level, subtype);
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if (evt->u.user_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
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level, evt->u.user_error.effective_address);
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break;
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case MCE_ERROR_TYPE_RA:
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subtype = evt->u.ra_error.ra_error_type <
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ARRAY_SIZE(mc_ra_types) ?
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mc_ra_types[evt->u.ra_error.ra_error_type]
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: "Unknown";
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printk("%s Error type: Real address [%s]\n", level, subtype);
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if (evt->u.ra_error.effective_address_provided)
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printk("%s Effective address: %016llx\n",
|
|
level, evt->u.ra_error.effective_address);
|
|
break;
|
|
case MCE_ERROR_TYPE_LINK:
|
|
subtype = evt->u.link_error.link_error_type <
|
|
ARRAY_SIZE(mc_link_types) ?
|
|
mc_link_types[evt->u.link_error.link_error_type]
|
|
: "Unknown";
|
|
printk("%s Error type: Link [%s]\n", level, subtype);
|
|
if (evt->u.link_error.effective_address_provided)
|
|
printk("%s Effective address: %016llx\n",
|
|
level, evt->u.link_error.effective_address);
|
|
break;
|
|
default:
|
|
case MCE_ERROR_TYPE_UNKNOWN:
|
|
printk("%s Error type: Unknown\n", level);
|
|
break;
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(machine_check_print_event_info);
|
|
|
|
/*
|
|
* This function is called in real mode. Strictly no printk's please.
|
|
*
|
|
* regs->nip and regs->msr contains srr0 and ssr1.
|
|
*/
|
|
long machine_check_early(struct pt_regs *regs)
|
|
{
|
|
long handled = 0;
|
|
|
|
__this_cpu_inc(irq_stat.mce_exceptions);
|
|
|
|
if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
|
|
handled = cur_cpu_spec->machine_check_early(regs);
|
|
return handled;
|
|
}
|
|
|
|
/* Possible meanings for HMER_DEBUG_TRIG bit being set on POWER9 */
|
|
static enum {
|
|
DTRIG_UNKNOWN,
|
|
DTRIG_VECTOR_CI, /* need to emulate vector CI load instr */
|
|
DTRIG_SUSPEND_ESCAPE, /* need to escape from TM suspend mode */
|
|
} hmer_debug_trig_function;
|
|
|
|
static int init_debug_trig_function(void)
|
|
{
|
|
int pvr;
|
|
struct device_node *cpun;
|
|
struct property *prop = NULL;
|
|
const char *str;
|
|
|
|
/* First look in the device tree */
|
|
preempt_disable();
|
|
cpun = of_get_cpu_node(smp_processor_id(), NULL);
|
|
if (cpun) {
|
|
of_property_for_each_string(cpun, "ibm,hmi-special-triggers",
|
|
prop, str) {
|
|
if (strcmp(str, "bit17-vector-ci-load") == 0)
|
|
hmer_debug_trig_function = DTRIG_VECTOR_CI;
|
|
else if (strcmp(str, "bit17-tm-suspend-escape") == 0)
|
|
hmer_debug_trig_function = DTRIG_SUSPEND_ESCAPE;
|
|
}
|
|
of_node_put(cpun);
|
|
}
|
|
preempt_enable();
|
|
|
|
/* If we found the property, don't look at PVR */
|
|
if (prop)
|
|
goto out;
|
|
|
|
pvr = mfspr(SPRN_PVR);
|
|
/* Check for POWER9 Nimbus (scale-out) */
|
|
if ((PVR_VER(pvr) == PVR_POWER9) && (pvr & 0xe000) == 0) {
|
|
/* DD2.2 and later */
|
|
if ((pvr & 0xfff) >= 0x202)
|
|
hmer_debug_trig_function = DTRIG_SUSPEND_ESCAPE;
|
|
/* DD2.0 and DD2.1 - used for vector CI load emulation */
|
|
else if ((pvr & 0xfff) >= 0x200)
|
|
hmer_debug_trig_function = DTRIG_VECTOR_CI;
|
|
}
|
|
|
|
out:
|
|
switch (hmer_debug_trig_function) {
|
|
case DTRIG_VECTOR_CI:
|
|
pr_debug("HMI debug trigger used for vector CI load\n");
|
|
break;
|
|
case DTRIG_SUSPEND_ESCAPE:
|
|
pr_debug("HMI debug trigger used for TM suspend escape\n");
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
__initcall(init_debug_trig_function);
|
|
|
|
/*
|
|
* Handle HMIs that occur as a result of a debug trigger.
|
|
* Return values:
|
|
* -1 means this is not a HMI cause that we know about
|
|
* 0 means no further handling is required
|
|
* 1 means further handling is required
|
|
*/
|
|
long hmi_handle_debugtrig(struct pt_regs *regs)
|
|
{
|
|
unsigned long hmer = mfspr(SPRN_HMER);
|
|
long ret = 0;
|
|
|
|
/* HMER_DEBUG_TRIG bit is used for various workarounds on P9 */
|
|
if (!((hmer & HMER_DEBUG_TRIG)
|
|
&& hmer_debug_trig_function != DTRIG_UNKNOWN))
|
|
return -1;
|
|
|
|
hmer &= ~HMER_DEBUG_TRIG;
|
|
/* HMER is a write-AND register */
|
|
mtspr(SPRN_HMER, ~HMER_DEBUG_TRIG);
|
|
|
|
switch (hmer_debug_trig_function) {
|
|
case DTRIG_VECTOR_CI:
|
|
/*
|
|
* Now to avoid problems with soft-disable we
|
|
* only do the emulation if we are coming from
|
|
* host user space
|
|
*/
|
|
if (regs && user_mode(regs))
|
|
ret = local_paca->hmi_p9_special_emu = 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* See if any other HMI causes remain to be handled
|
|
*/
|
|
if (hmer & mfspr(SPRN_HMEER))
|
|
return -1;
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Return values:
|
|
*/
|
|
long hmi_exception_realmode(struct pt_regs *regs)
|
|
{
|
|
int ret;
|
|
|
|
__this_cpu_inc(irq_stat.hmi_exceptions);
|
|
|
|
ret = hmi_handle_debugtrig(regs);
|
|
if (ret >= 0)
|
|
return ret;
|
|
|
|
wait_for_subcore_guest_exit();
|
|
|
|
if (ppc_md.hmi_exception_early)
|
|
ppc_md.hmi_exception_early(regs);
|
|
|
|
wait_for_tb_resync();
|
|
|
|
return 1;
|
|
}
|