85 lines
1.5 KiB
C
85 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __HELIO_DVFSRC_IPI_H
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#define __HELIO_DVFSRC_IPI_H
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#ifdef CONFIG_MTK_TINYSYS_SSPM_SUPPORT
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#include <sspm_ipi.h>
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#include <sspm_ipi_pin.h>
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enum {
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QOS_IPI_QOS_ENABLE = 0,
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QOS_IPI_OPP_TABLE,
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QOS_IPI_VCORE_OPP,
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QOS_IPI_DDR_OPP,
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QOS_IPI_ERROR_HANDLER,
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QOS_IPI_SWPM_INIT,
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QOS_IPI_UPOWER_DATA_TRANSFER,
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QOS_IPI_UPOWER_DUMP_TABLE,
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QOS_IPI_GET_GPU_BW,
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QOS_IPI_SWPM_ENABLE,
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QOS_IPI_SWPM_SET_UPDATE_CNT,
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NR_QOS_IPI,
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};
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struct qos_ipi_data {
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unsigned int cmd;
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union {
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struct {
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unsigned int dvfsrc_en;
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} qos_init;
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struct {
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unsigned int vcore_dvfs_opp;
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unsigned int vcore_uv;
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unsigned int ddr_khz;
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} opp_table;
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struct {
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unsigned int vcore_dvfs_opp;
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unsigned int vcore_opp;
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} vcore_opp;
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struct {
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unsigned int vcore_dvfs_opp;
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unsigned int ddr_opp;
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} ddr_opp;
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struct {
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unsigned int master_type;
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unsigned int emi_data;
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unsigned int predict_data;
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} error_handler;
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struct {
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unsigned int dram_addr;
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unsigned int dram_size;
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unsigned int dram_ch_num;
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} swpm_init;
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struct {
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unsigned int type;
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unsigned int enable;
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} swpm_enable;
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struct {
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unsigned int type;
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unsigned int cnt;
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} swpm_set_update_cnt;
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struct {
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unsigned int arg[3];
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} upower_data;
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} u;
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};
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static int qos_ipi_to_sspm_command(void *buffer, int slot)
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{
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int ack_data;
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return sspm_ipi_send_sync(IPI_ID_QOS, IPI_OPT_POLLING,
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buffer, slot, &ack_data, 1);
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}
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#endif
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#endif
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