6db4831e98
Android 14
470 lines
12 KiB
C
470 lines
12 KiB
C
/*
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* Copyright 2011 Red Hat, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "qxl_drv.h"
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#include "qxl_object.h"
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#include <trace/events/dma_fence.h>
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/*
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* drawable cmd cache - allocate a bunch of VRAM pages, suballocate
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* into 256 byte chunks for now - gives 16 cmds per page.
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*
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* use an ida to index into the chunks?
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*/
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/* manage releaseables */
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/* stack them 16 high for now -drawable object is 191 */
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#define RELEASE_SIZE 256
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#define RELEASES_PER_BO (4096 / RELEASE_SIZE)
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/* put an alloc/dealloc surface cmd into one bo and round up to 128 */
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#define SURFACE_RELEASE_SIZE 128
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#define SURFACE_RELEASES_PER_BO (4096 / SURFACE_RELEASE_SIZE)
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static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
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static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };
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static const char *qxl_get_driver_name(struct dma_fence *fence)
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{
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return "qxl";
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}
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static const char *qxl_get_timeline_name(struct dma_fence *fence)
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{
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return "release";
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}
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static long qxl_fence_wait(struct dma_fence *fence, bool intr,
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signed long timeout)
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{
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struct qxl_device *qdev;
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struct qxl_release *release;
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int count = 0, sc = 0;
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bool have_drawable_releases;
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unsigned long cur, end = jiffies + timeout;
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qdev = container_of(fence->lock, struct qxl_device, release_lock);
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release = container_of(fence, struct qxl_release, base);
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have_drawable_releases = release->type == QXL_RELEASE_DRAWABLE;
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retry:
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sc++;
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if (dma_fence_is_signaled(fence))
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goto signaled;
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qxl_io_notify_oom(qdev);
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for (count = 0; count < 11; count++) {
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if (!qxl_queue_garbage_collect(qdev, true))
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break;
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if (dma_fence_is_signaled(fence))
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goto signaled;
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}
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if (dma_fence_is_signaled(fence))
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goto signaled;
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if (have_drawable_releases || sc < 4) {
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if (sc > 2)
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/* back off */
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usleep_range(500, 1000);
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if (time_after(jiffies, end))
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return 0;
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if (have_drawable_releases && sc > 300) {
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DMA_FENCE_WARN(fence, "failed to wait on release %llu "
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"after spincount %d\n",
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fence->context & ~0xf0000000, sc);
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goto signaled;
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}
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goto retry;
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}
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/*
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* yeah, original sync_obj_wait gave up after 3 spins when
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* have_drawable_releases is not set.
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*/
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signaled:
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cur = jiffies;
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if (time_after(cur, end))
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return 0;
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return end - cur;
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}
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static const struct dma_fence_ops qxl_fence_ops = {
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.get_driver_name = qxl_get_driver_name,
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.get_timeline_name = qxl_get_timeline_name,
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.wait = qxl_fence_wait,
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};
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static int
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qxl_release_alloc(struct qxl_device *qdev, int type,
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struct qxl_release **ret)
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{
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struct qxl_release *release;
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int handle;
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size_t size = sizeof(*release);
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release = kmalloc(size, GFP_KERNEL);
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if (!release) {
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DRM_ERROR("Out of memory\n");
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return -ENOMEM;
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}
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release->base.ops = NULL;
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release->type = type;
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release->release_offset = 0;
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release->surface_release_id = 0;
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INIT_LIST_HEAD(&release->bos);
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idr_preload(GFP_KERNEL);
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spin_lock(&qdev->release_idr_lock);
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handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
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release->base.seqno = ++qdev->release_seqno;
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spin_unlock(&qdev->release_idr_lock);
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idr_preload_end();
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if (handle < 0) {
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kfree(release);
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*ret = NULL;
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return handle;
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}
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*ret = release;
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DRM_DEBUG_DRIVER("allocated release %d\n", handle);
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release->id = handle;
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return handle;
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}
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static void
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qxl_release_free_list(struct qxl_release *release)
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{
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while (!list_empty(&release->bos)) {
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struct qxl_bo_list *entry;
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struct qxl_bo *bo;
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entry = container_of(release->bos.next,
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struct qxl_bo_list, tv.head);
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bo = to_qxl_bo(entry->tv.bo);
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qxl_bo_unref(&bo);
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list_del(&entry->tv.head);
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kfree(entry);
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}
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release->release_bo = NULL;
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}
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void
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qxl_release_free(struct qxl_device *qdev,
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struct qxl_release *release)
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{
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DRM_DEBUG_DRIVER("release %d, type %d\n", release->id, release->type);
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if (release->surface_release_id)
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qxl_surface_id_dealloc(qdev, release->surface_release_id);
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spin_lock(&qdev->release_idr_lock);
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idr_remove(&qdev->release_idr, release->id);
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spin_unlock(&qdev->release_idr_lock);
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if (release->base.ops) {
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WARN_ON(list_empty(&release->bos));
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qxl_release_free_list(release);
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dma_fence_signal(&release->base);
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dma_fence_put(&release->base);
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} else {
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qxl_release_free_list(release);
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kfree(release);
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}
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}
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static int qxl_release_bo_alloc(struct qxl_device *qdev,
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struct qxl_bo **bo)
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{
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/* pin releases bo's they are too messy to evict */
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return qxl_bo_create(qdev, PAGE_SIZE, false, true,
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QXL_GEM_DOMAIN_VRAM, NULL, bo);
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}
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int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
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{
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struct qxl_bo_list *entry;
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list_for_each_entry(entry, &release->bos, tv.head) {
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if (entry->tv.bo == &bo->tbo)
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return 0;
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}
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entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
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if (!entry)
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return -ENOMEM;
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qxl_bo_ref(bo);
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entry->tv.bo = &bo->tbo;
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entry->tv.shared = false;
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list_add_tail(&entry->tv.head, &release->bos);
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return 0;
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}
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static int qxl_release_validate_bo(struct qxl_bo *bo)
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{
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struct ttm_operation_ctx ctx = { true, false };
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int ret;
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if (!bo->pin_count) {
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qxl_ttm_placement_from_domain(bo, bo->type, false);
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ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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if (ret)
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return ret;
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}
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ret = reservation_object_reserve_shared(bo->tbo.resv);
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if (ret)
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return ret;
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/* allocate a surface for reserved + validated buffers */
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ret = qxl_bo_check_id(bo->gem_base.dev->dev_private, bo);
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if (ret)
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return ret;
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return 0;
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}
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int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
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{
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int ret;
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struct qxl_bo_list *entry;
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/* if only one object on the release its the release itself
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since these objects are pinned no need to reserve */
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if (list_is_singular(&release->bos))
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return 0;
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ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos,
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!no_intr, NULL);
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if (ret)
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return ret;
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list_for_each_entry(entry, &release->bos, tv.head) {
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struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
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ret = qxl_release_validate_bo(bo);
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if (ret) {
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ttm_eu_backoff_reservation(&release->ticket, &release->bos);
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return ret;
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}
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}
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return 0;
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}
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void qxl_release_backoff_reserve_list(struct qxl_release *release)
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{
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/* if only one object on the release its the release itself
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since these objects are pinned no need to reserve */
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if (list_is_singular(&release->bos))
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return;
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ttm_eu_backoff_reservation(&release->ticket, &release->bos);
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}
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int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
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enum qxl_surface_cmd_type surface_cmd_type,
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struct qxl_release *create_rel,
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struct qxl_release **release)
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{
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if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
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int idr_ret;
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struct qxl_bo *bo;
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union qxl_release_info *info;
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/* stash the release after the create command */
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idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
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if (idr_ret < 0)
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return idr_ret;
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bo = create_rel->release_bo;
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(*release)->release_bo = bo;
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(*release)->release_offset = create_rel->release_offset + 64;
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qxl_release_list_add(*release, bo);
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info = qxl_release_map(qdev, *release);
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info->id = idr_ret;
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qxl_release_unmap(qdev, *release, info);
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return 0;
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}
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return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
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QXL_RELEASE_SURFACE_CMD, release, NULL);
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}
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int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
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int type, struct qxl_release **release,
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struct qxl_bo **rbo)
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{
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struct qxl_bo *bo;
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int idr_ret;
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int ret = 0;
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union qxl_release_info *info;
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int cur_idx;
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if (type == QXL_RELEASE_DRAWABLE)
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cur_idx = 0;
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else if (type == QXL_RELEASE_SURFACE_CMD)
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cur_idx = 1;
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else if (type == QXL_RELEASE_CURSOR_CMD)
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cur_idx = 2;
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else {
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DRM_ERROR("got illegal type: %d\n", type);
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return -EINVAL;
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}
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idr_ret = qxl_release_alloc(qdev, type, release);
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if (idr_ret < 0) {
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if (rbo)
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*rbo = NULL;
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return idr_ret;
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}
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mutex_lock(&qdev->release_mutex);
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if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
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qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
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qdev->current_release_bo_offset[cur_idx] = 0;
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qdev->current_release_bo[cur_idx] = NULL;
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}
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if (!qdev->current_release_bo[cur_idx]) {
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ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx]);
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if (ret) {
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mutex_unlock(&qdev->release_mutex);
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qxl_release_free(qdev, *release);
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return ret;
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}
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}
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bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);
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(*release)->release_bo = bo;
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(*release)->release_offset = qdev->current_release_bo_offset[cur_idx] * release_size_per_bo[cur_idx];
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qdev->current_release_bo_offset[cur_idx]++;
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if (rbo)
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*rbo = bo;
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mutex_unlock(&qdev->release_mutex);
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ret = qxl_release_list_add(*release, bo);
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qxl_bo_unref(&bo);
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if (ret) {
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qxl_release_free(qdev, *release);
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return ret;
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}
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info = qxl_release_map(qdev, *release);
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info->id = idr_ret;
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qxl_release_unmap(qdev, *release, info);
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return ret;
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}
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struct qxl_release *qxl_release_from_id_locked(struct qxl_device *qdev,
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uint64_t id)
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{
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struct qxl_release *release;
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spin_lock(&qdev->release_idr_lock);
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release = idr_find(&qdev->release_idr, id);
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spin_unlock(&qdev->release_idr_lock);
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if (!release) {
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DRM_ERROR("failed to find id in release_idr\n");
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return NULL;
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}
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return release;
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}
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union qxl_release_info *qxl_release_map(struct qxl_device *qdev,
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struct qxl_release *release)
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{
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void *ptr;
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union qxl_release_info *info;
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struct qxl_bo *bo = release->release_bo;
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ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_MASK);
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if (!ptr)
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return NULL;
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info = ptr + (release->release_offset & ~PAGE_MASK);
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return info;
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}
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void qxl_release_unmap(struct qxl_device *qdev,
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struct qxl_release *release,
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union qxl_release_info *info)
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{
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struct qxl_bo *bo = release->release_bo;
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void *ptr;
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ptr = ((void *)info) - (release->release_offset & ~PAGE_MASK);
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qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
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}
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void qxl_release_fence_buffer_objects(struct qxl_release *release)
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{
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struct ttm_buffer_object *bo;
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struct ttm_bo_global *glob;
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struct ttm_bo_device *bdev;
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struct ttm_bo_driver *driver;
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struct qxl_bo *qbo;
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struct ttm_validate_buffer *entry;
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struct qxl_device *qdev;
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/* if only one object on the release its the release itself
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since these objects are pinned no need to reserve */
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if (list_is_singular(&release->bos) || list_empty(&release->bos))
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return;
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bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
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bdev = bo->bdev;
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qdev = container_of(bdev, struct qxl_device, mman.bdev);
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/*
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* Since we never really allocated a context and we don't want to conflict,
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* set the highest bits. This will break if we really allow exporting of dma-bufs.
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*/
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dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
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release->id | 0xf0000000, release->base.seqno);
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trace_dma_fence_emit(&release->base);
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driver = bdev->driver;
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glob = bdev->glob;
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spin_lock(&glob->lru_lock);
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list_for_each_entry(entry, &release->bos, head) {
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bo = entry->bo;
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qbo = to_qxl_bo(bo);
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reservation_object_add_shared_fence(bo->resv, &release->base);
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ttm_bo_add_to_lru(bo);
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reservation_object_unlock(bo->resv);
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}
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spin_unlock(&glob->lru_lock);
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ww_acquire_fini(&release->ticket);
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}
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