905 lines
29 KiB
C
905 lines
29 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2019 MediaTek Inc.
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/mt6357/registers.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6357-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#define MT6357_BUCK_MODE_AUTO 0
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#define MT6357_BUCK_MODE_FORCE_PWM 1
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#define MT6357_BUCK_MODE_NORMAL 0
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#define MT6357_BUCK_MODE_LP 2
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#define DEF_OC_IRQ_ENABLE_DELAY_MS 10
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/*
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* MT6357 regulators' information
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*
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* @desc: standard fields of regulator description.
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* @status_reg: for query status of regulators.
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* @qi: Mask for query enable signal status of regulators.
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* @modeset_reg: for operating AUTO/PWM mode register.
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* @modeset_mask: MASK for operating modeset register.
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* @modeset_shift: SHIFT for operating modeset register.
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*/
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struct mt6357_regulator_info {
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int irq;
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int oc_irq_enable_delay_ms;
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struct delayed_work oc_work;
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struct regulator_desc desc;
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u32 status_reg;
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u32 qi;
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const u32 *index_table;
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unsigned int n_table;
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u32 vsel_shift;
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u32 da_vsel_reg;
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u32 da_vsel_mask;
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u32 da_vsel_shift;
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u32 modeset_reg;
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u32 modeset_mask;
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u32 modeset_shift;
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u32 maskirq_reg;
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u32 maskirq_shift;
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};
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#define MT6357_BUCK(match, _name, min, max, step, min_sel, \
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volt_ranges, _enable_reg, _status_reg, \
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_da_vsel_reg, _da_vsel_mask, _da_vsel_shift, \
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_vsel_reg, _vsel_mask, \
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_modeset_reg, _modeset_shift, \
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_maskirq_reg, _maskirq_shift) \
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[MT6357_ID_##_name] = { \
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.desc = { \
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.name = #_name, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6357_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6357_ID_##_name, \
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.owner = THIS_MODULE, \
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.uV_step = (step), \
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.linear_min_sel = (min_sel), \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.min_uV = (min), \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = _vsel_reg, \
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.vsel_mask = _vsel_mask, \
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.enable_reg = _enable_reg, \
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.enable_mask = BIT(0), \
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.of_map_mode = mt6357_map_mode, \
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}, \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.da_vsel_shift = _da_vsel_shift, \
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.status_reg = _status_reg, \
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.qi = BIT(0), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = BIT(_modeset_shift), \
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.modeset_shift = _modeset_shift, \
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.maskirq_reg = _maskirq_reg, \
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.maskirq_shift = _maskirq_shift, \
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}
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#define MT6357_LDO_LINEAR(match, _name, min, max, step, min_sel,\
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volt_ranges, _enable_reg, _status_reg, \
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_da_vsel_reg, _da_vsel_mask, _da_vsel_shift, \
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_vsel_reg, _vsel_mask, \
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_maskirq_reg, _maskirq_shift) \
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[MT6357_ID_##_name] = { \
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.desc = { \
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.name = #_name, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6357_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6357_ID_##_name, \
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.owner = THIS_MODULE, \
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.uV_step = (step), \
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.linear_min_sel = (min_sel), \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.min_uV = (min), \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = _vsel_reg, \
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.vsel_mask = _vsel_mask, \
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.enable_reg = _enable_reg, \
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.enable_mask = BIT(0), \
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}, \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.da_vsel_shift = _da_vsel_shift, \
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.status_reg = _status_reg, \
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.maskirq_reg = _maskirq_reg, \
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.maskirq_shift = _maskirq_shift, \
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.qi = BIT(0), \
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}
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#define MT6357_LDO(match, _name, _volt_table, _index_table, \
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_enable_reg, _enable_mask, _status_reg, \
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_vsel_reg, _vsel_mask, _vsel_shift, \
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_maskirq_reg, _maskirq_shift) \
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[MT6357_ID_##_name] = { \
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.desc = { \
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.name = #_name, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6357_volt_table_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6357_ID_##_name, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(_volt_table), \
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.volt_table = _volt_table, \
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.vsel_reg = _vsel_reg, \
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.vsel_mask = _vsel_mask, \
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.enable_reg = _enable_reg, \
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.enable_mask = BIT(_enable_mask), \
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}, \
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.status_reg = _status_reg, \
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.maskirq_reg = _maskirq_reg, \
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.maskirq_shift = _maskirq_shift, \
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.qi = BIT(15), \
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.index_table = _index_table, \
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.n_table = ARRAY_SIZE(_index_table), \
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.vsel_shift = _vsel_shift, \
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}
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#define MT6357_REG_FIXED(match, _name, _enable_reg, \
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_status_reg, _fixed_volt, \
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_maskirq_reg, _maskirq_shift) \
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[MT6357_ID_##_name] = { \
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.desc = { \
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.name = #_name, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6357_volt_fixed_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6357_ID_##_name, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = _enable_reg, \
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.enable_mask = BIT(0), \
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.fixed_uV = (_fixed_volt), \
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}, \
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.status_reg = _status_reg, \
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.maskirq_reg = _maskirq_reg, \
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.maskirq_shift = _maskirq_shift, \
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.qi = BIT(15), \
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}
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#define MT6357_LDO_VMC_DESC(match, _name, volt_ranges, \
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_enable_reg, _status_reg, _vsel_reg, _vsel_mask,\
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_maskirq_reg, _maskirq_shift) \
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[MT6357_ID_##_name] = { \
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.desc = { \
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.name = #_name, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6357_vmc_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6357_ID_##_name, \
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.owner = THIS_MODULE, \
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.n_voltages = 0xd01, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges),\
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.vsel_reg = _vsel_reg, \
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.vsel_mask = _vsel_mask, \
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.enable_reg = _enable_reg, \
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.enable_mask = BIT(0), \
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}, \
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.status_reg = _status_reg, \
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.maskirq_reg = _maskirq_reg, \
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.maskirq_shift = _maskirq_shift, \
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.qi = BIT(15), \
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}
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static const struct regulator_linear_range mt_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250),
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};
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static const struct regulator_linear_range mt_volt_range2[] = {
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REGULATOR_LINEAR_RANGE(518750, 0, 0x7f, 6250),
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};
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static const struct regulator_linear_range mt_volt_range3[] = {
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REGULATOR_LINEAR_RANGE(1200000, 0, 0x50, 12500),
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};
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static const struct regulator_linear_range mt_volt_range4[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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/* for vmc voltage calibration: 1.86V, range 1.8 ~ 3.3V */
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static const struct regulator_linear_range mt_volt_range5[] = {
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REGULATOR_LINEAR_RANGE(1800000, 0x400, 0x400, 0),
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REGULATOR_LINEAR_RANGE(1810000, 0x401, 0x40a, 10000),
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REGULATOR_LINEAR_RANGE(2900000, 0xa00, 0xa00, 0),
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REGULATOR_LINEAR_RANGE(2910000, 0xa01, 0xa09, 10000),
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REGULATOR_LINEAR_RANGE(3000000, 0xb00, 0xb00, 0),
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REGULATOR_LINEAR_RANGE(3010000, 0xb01, 0xb0a, 10000),
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REGULATOR_LINEAR_RANGE(3300000, 0xd00, 0xd00, 0),
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};
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static const u32 vxo22_voltages[] = {
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2200000, 2400000,
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};
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static const u32 vefuse_voltages[] = {
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1200000, 1300000, 1500000, 1800000, 2800000, 2900000, 3000000, 3300000,
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};
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static const u32 vcn33_bt_voltages[] = {
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3300000, 3400000, 3500000,
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};
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static const u32 vcn33_wifi_voltages[] = {
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3300000, 3400000, 3500000,
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};
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static const u32 vcama_voltages[] = {
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1800000, 2500000, 2800000,
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};
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static const u32 vcamd_voltages[] = {
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1000000, 1100000, 1200000, 1300000, 1500000, 1800000,
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};
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static const u32 vldo28_voltages[] = {
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2800000, 3000000,
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};
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static const u32 vdram_voltages[] = {
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1100000, 1200000,
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};
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static const u32 vmch_voltages[] = {
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2900000, 3000000, 3300000,
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};
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static const u32 vemc_voltages[] = {
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2900000, 3000000, 3300000,
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};
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static const u32 vsim1_voltages[] = {
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1700000, 1800000, 2700000, 3000000, 3100000,
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};
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static const u32 vsim2_voltages[] = {
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1700000, 1800000, 2700000, 3000000, 3100000,
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};
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static const u32 vibr_voltages[] = {
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1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
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};
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static const u32 vusb33_voltages[] = {
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3000000, 3100000,
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};
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static const u32 vxo22_idx[] = {
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0, 2,
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};
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static const u32 vefuse_idx[] = {
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0, 1, 2, 4, 9, 10, 11, 13,
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};
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static const u32 vcn33_bt_idx[] = {
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1, 2, 3,
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};
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static const u32 vcn33_wifi_idx[] = {
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1, 2, 3,
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};
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static const u32 vcama_idx[] = {
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0, 7, 10,
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};
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static const u32 vcamd_idx[] = {
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4, 5, 6, 7, 9, 12,
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};
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static const u32 vldo28_idx[] = {
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1, 3,
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};
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static const u32 vdram_idx[] = {
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1, 2,
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};
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static const u32 vmch_idx[] = {
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2, 3, 5,
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};
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static const u32 vemc_idx[] = {
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2, 3, 5,
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};
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static const u32 vsim1_idx[] = {
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3, 4, 8, 11, 12,
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};
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static const u32 vsim2_idx[] = {
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3, 4, 8, 11, 12,
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};
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static const u32 vibr_idx[] = {
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0, 1, 2, 4, 5, 9, 11, 13,
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};
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static const u32 vusb33_idx[] = {
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3, 4,
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};
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static int mt6357_regulator_enable(struct regulator_dev *rdev)
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{
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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int ret = 0, ret2 = 0;
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ret = regulator_enable_regmap(rdev);
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/* Unmask oc irq after enable regulator */
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ret2 = regmap_update_bits(rdev->regmap, info->maskirq_reg,
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0x1 << info->maskirq_shift,
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0 << info->maskirq_shift);
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return ret;
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}
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static int mt6357_regulator_disable(struct regulator_dev *rdev)
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{
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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int ret = 0;
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if (rdev->use_count == 0) {
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dev_notice(&rdev->dev, "%s:%s should not be disable.(use_count=0)\n"
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, __func__, rdev->desc->name);
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ret = -EIO;
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} else {
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/* Mask oc irq before disable regulator */
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ret = regmap_update_bits(rdev->regmap, info->maskirq_reg,
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0x1 << info->maskirq_shift,
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0x1 << info->maskirq_shift);
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ret = regulator_disable_regmap(rdev);
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}
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return ret;
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}
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static inline unsigned int mt6357_map_mode(unsigned int mode)
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{
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switch (mode) {
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case MT6357_BUCK_MODE_NORMAL:
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return REGULATOR_MODE_NORMAL;
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case MT6357_BUCK_MODE_FORCE_PWM:
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return REGULATOR_MODE_FAST;
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case MT6357_BUCK_MODE_LP:
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return REGULATOR_MODE_IDLE;
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default:
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return REGULATOR_MODE_INVALID;
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}
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}
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static int mt6357_set_voltage_sel(struct regulator_dev *rdev,
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unsigned int selector)
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{
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int idx = 0, ret = 0;
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const u32 *pvol;
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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pvol = info->index_table;
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idx = pvol[selector];
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ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg,
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info->desc.vsel_mask,
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idx << info->vsel_shift);
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return ret;
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}
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static int mt6357_get_voltage_sel(struct regulator_dev *rdev)
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{
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int idx = 0, ret = 0;
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u32 selector = 0;
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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const u32 *pvol;
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ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6357 %s vsel reg: %d\n",
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info->desc.name, ret);
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return ret;
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}
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selector = (selector & info->desc.vsel_mask) >> info->vsel_shift;
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pvol = info->index_table;
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for (idx = 0; idx < info->desc.n_voltages; idx++) {
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if (pvol[idx] == selector)
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return idx;
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}
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return -EINVAL;
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}
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static int mt6357_get_linear_voltage_sel(struct regulator_dev *rdev)
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{
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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int ret = 0, regval = 0;
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ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6357 Buck %s vsel reg: %d\n",
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info->desc.name, ret);
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return ret;
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}
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ret = (regval >> info->da_vsel_shift) & info->da_vsel_mask;
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return ret;
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}
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static int mt6357_get_status(struct regulator_dev *rdev)
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{
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int ret = 0;
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u32 regval = 0;
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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ret = regmap_read(rdev->regmap, info->status_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static unsigned int mt6357_regulator_get_mode(struct regulator_dev *rdev)
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{
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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int ret = 0, regval = 0;
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ret = regmap_read(rdev->regmap, info->modeset_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6357 buck mode: %d\n", ret);
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return ret;
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}
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switch ((regval & info->modeset_mask) >> info->modeset_shift) {
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case MT6357_BUCK_MODE_AUTO:
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return REGULATOR_MODE_NORMAL;
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case MT6357_BUCK_MODE_FORCE_PWM:
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return REGULATOR_MODE_FAST;
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default:
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return -EINVAL;
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}
|
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}
|
|
|
|
static int mt6357_regulator_set_mode(struct regulator_dev *rdev,
|
|
unsigned int mode)
|
|
{
|
|
struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
|
|
int val = 0;
|
|
|
|
switch (mode) {
|
|
case REGULATOR_MODE_FAST:
|
|
val = MT6357_BUCK_MODE_FORCE_PWM;
|
|
break;
|
|
case REGULATOR_MODE_NORMAL:
|
|
val = MT6357_BUCK_MODE_AUTO;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_dbg(&rdev->dev, "mt6357 buck set_mode %#x, %#x, %#x, %#x\n",
|
|
info->modeset_reg, info->modeset_mask,
|
|
info->modeset_shift, val);
|
|
|
|
val <<= info->modeset_shift;
|
|
|
|
return regmap_update_bits(rdev->regmap, info->modeset_reg,
|
|
info->modeset_mask, val);
|
|
}
|
|
|
|
static const struct regulator_ops mt6357_volt_range_ops = {
|
|
.list_voltage = regulator_list_voltage_linear_range,
|
|
.map_voltage = regulator_map_voltage_linear_range,
|
|
.set_voltage_sel = regulator_set_voltage_sel_regmap,
|
|
.get_voltage_sel = mt6357_get_linear_voltage_sel,
|
|
.set_voltage_time_sel = regulator_set_voltage_time_sel,
|
|
.enable = mt6357_regulator_enable,
|
|
.disable = mt6357_regulator_disable,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6357_get_status,
|
|
.set_mode = mt6357_regulator_set_mode,
|
|
.get_mode = mt6357_regulator_get_mode,
|
|
};
|
|
|
|
static const struct regulator_ops mt6357_volt_table_ops = {
|
|
.list_voltage = regulator_list_voltage_table,
|
|
.map_voltage = regulator_map_voltage_iterate,
|
|
.set_voltage_sel = mt6357_set_voltage_sel,
|
|
.get_voltage_sel = mt6357_get_voltage_sel,
|
|
.set_voltage_time_sel = regulator_set_voltage_time_sel,
|
|
.enable = mt6357_regulator_enable,
|
|
.disable = mt6357_regulator_disable,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6357_get_status,
|
|
};
|
|
|
|
static const struct regulator_ops mt6357_volt_fixed_ops = {
|
|
.enable = mt6357_regulator_enable,
|
|
.disable = mt6357_regulator_disable,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6357_get_status,
|
|
};
|
|
|
|
static const struct regulator_ops mt6357_vmc_ops = {
|
|
.list_voltage = regulator_list_voltage_linear_range,
|
|
.enable = mt6357_regulator_enable,
|
|
.disable = mt6357_regulator_disable,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6357_get_status,
|
|
.set_voltage_sel = regulator_set_voltage_sel_regmap,
|
|
.get_voltage_sel = regulator_get_voltage_sel_regmap,
|
|
.set_voltage_time_sel = regulator_set_voltage_time_sel,
|
|
};
|
|
|
|
/* The array is indexed by id(MT6357_ID_XXX) */
|
|
static struct mt6357_regulator_info mt6357_regulators[] = {
|
|
MT6357_BUCK("buck_vs1", VS1, 1200000, 2200000, 12500, 0,
|
|
mt_volt_range3, MT6357_RG_BUCK_VS1_EN_ADDR,
|
|
MT6357_DA_VS1_EN_ADDR, MT6357_DA_VS1_VOSEL_ADDR,
|
|
MT6357_DA_VS1_VOSEL_MASK, MT6357_DA_VS1_VOSEL_SHIFT,
|
|
MT6357_RG_BUCK_VS1_VOSEL_ADDR,
|
|
MT6357_RG_BUCK_VS1_VOSEL_MASK <<
|
|
MT6357_RG_BUCK_VS1_VOSEL_SHIFT,
|
|
MT6357_RG_VS1_MODESET_ADDR, MT6357_RG_VS1_MODESET_SHIFT,
|
|
MT6357_RG_INT_MASK_VS1_OC_ADDR, MT6357_RG_INT_MASK_VS1_OC_SHIFT),
|
|
MT6357_BUCK("buck_vmodem", VMODEM, 500000, 1193750, 6250, 0,
|
|
mt_volt_range1, MT6357_RG_BUCK_VMODEM_EN_ADDR,
|
|
MT6357_DA_VMODEM_EN_ADDR, MT6357_DA_VMODEM_VOSEL_ADDR,
|
|
MT6357_DA_VMODEM_VOSEL_MASK, MT6357_DA_VMODEM_VOSEL_SHIFT,
|
|
MT6357_RG_BUCK_VMODEM_VOSEL_ADDR,
|
|
MT6357_RG_BUCK_VMODEM_VOSEL_MASK <<
|
|
MT6357_RG_BUCK_VMODEM_VOSEL_SHIFT,
|
|
MT6357_RG_VMODEM_FPWM_ADDR, MT6357_RG_VMODEM_FPWM_SHIFT,
|
|
MT6357_RG_INT_MASK_VMODEM_OC_ADDR, MT6357_RG_INT_MASK_VMODEM_OC_SHIFT),
|
|
MT6357_BUCK("buck_vcore", VCORE, 518750, 1312500, 6250, 0,
|
|
mt_volt_range2, MT6357_RG_BUCK_VCORE_EN_ADDR,
|
|
MT6357_DA_VCORE_EN_ADDR, MT6357_DA_VCORE_VOSEL_ADDR,
|
|
MT6357_DA_VCORE_VOSEL_MASK, MT6357_DA_VCORE_VOSEL_SHIFT,
|
|
MT6357_RG_BUCK_VCORE_VOSEL_ADDR,
|
|
MT6357_RG_BUCK_VCORE_VOSEL_MASK <<
|
|
MT6357_RG_BUCK_VCORE_VOSEL_SHIFT,
|
|
MT6357_RG_VCORE_FPWM_ADDR, MT6357_RG_VCORE_FPWM_SHIFT,
|
|
MT6357_RG_INT_MASK_VCORE_OC_ADDR, MT6357_RG_INT_MASK_VCORE_OC_SHIFT),
|
|
MT6357_BUCK("buck_vproc", VPROC, 518750, 1312500, 6250, 0,
|
|
mt_volt_range2, MT6357_RG_BUCK_VPROC_EN_ADDR,
|
|
MT6357_DA_VPROC_EN_ADDR, MT6357_DA_VPROC_VOSEL_ADDR,
|
|
MT6357_DA_VPROC_VOSEL_MASK, MT6357_DA_VPROC_VOSEL_SHIFT,
|
|
MT6357_RG_BUCK_VPROC_VOSEL_ADDR,
|
|
MT6357_RG_BUCK_VPROC_VOSEL_MASK <<
|
|
MT6357_RG_BUCK_VPROC_VOSEL_SHIFT,
|
|
MT6357_RG_VPROC_FPWM_ADDR, MT6357_RG_VPROC_FPWM_SHIFT,
|
|
MT6357_RG_INT_MASK_VPROC_OC_ADDR, MT6357_RG_INT_MASK_VPROC_OC_SHIFT),
|
|
MT6357_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, 0,
|
|
mt_volt_range4, MT6357_RG_BUCK_VPA_EN_ADDR,
|
|
MT6357_DA_VPA_EN_ADDR, MT6357_DA_VPA_VOSEL_ADDR,
|
|
MT6357_DA_VPA_VOSEL_MASK, MT6357_DA_VPA_VOSEL_SHIFT,
|
|
MT6357_RG_BUCK_VPA_VOSEL_ADDR,
|
|
MT6357_RG_BUCK_VPA_VOSEL_MASK <<
|
|
MT6357_RG_BUCK_VPA_VOSEL_SHIFT,
|
|
MT6357_RG_VPA_MODESET_ADDR, MT6357_RG_VPA_MODESET_SHIFT,
|
|
MT6357_RG_INT_MASK_VPA_OC_ADDR, MT6357_RG_INT_MASK_VPA_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vfe28", VFE28, MT6357_RG_LDO_VFE28_EN_ADDR,
|
|
MT6357_DA_VFE28_EN_ADDR, 2800000,
|
|
MT6357_RG_INT_MASK_VFE28_OC_ADDR, MT6357_RG_INT_MASK_VFE28_OC_SHIFT),
|
|
MT6357_LDO("ldo_vxo22", VXO22, vxo22_voltages, vxo22_idx,
|
|
MT6357_RG_LDO_VXO22_EN_ADDR, MT6357_RG_LDO_VXO22_EN_SHIFT,
|
|
MT6357_DA_VXO22_EN_ADDR, MT6357_RG_VXO22_VOSEL_ADDR,
|
|
MT6357_RG_VXO22_VOSEL_MASK << MT6357_RG_VXO22_VOSEL_SHIFT,
|
|
MT6357_RG_VXO22_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VXO22_OC_ADDR, MT6357_RG_INT_MASK_VXO22_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vrf18", VRF18, MT6357_RG_LDO_VRF18_EN_ADDR,
|
|
MT6357_DA_VRF18_EN_ADDR, 1800000,
|
|
MT6357_RG_INT_MASK_VRF18_OC_ADDR, MT6357_RG_INT_MASK_VRF18_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vrf12", VRF12, MT6357_RG_LDO_VRF12_EN_ADDR,
|
|
MT6357_DA_VRF12_EN_ADDR, 1200000,
|
|
MT6357_RG_INT_MASK_VRF12_OC_ADDR, MT6357_RG_INT_MASK_VRF12_OC_SHIFT),
|
|
MT6357_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx,
|
|
MT6357_RG_LDO_VEFUSE_EN_ADDR, MT6357_RG_LDO_VEFUSE_EN_SHIFT,
|
|
MT6357_DA_VEFUSE_EN_ADDR, MT6357_RG_VEFUSE_VOSEL_ADDR,
|
|
MT6357_RG_VEFUSE_VOSEL_MASK <<
|
|
MT6357_RG_VEFUSE_VOSEL_SHIFT,
|
|
MT6357_RG_VEFUSE_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VEFUSE_OC_ADDR, MT6357_RG_INT_MASK_VEFUSE_OC_SHIFT),
|
|
MT6357_LDO("ldo_vcn33_bt", VCN33_BT, vcn33_bt_voltages, vcn33_bt_idx,
|
|
MT6357_RG_LDO_VCN33_EN_0_ADDR,
|
|
MT6357_RG_LDO_VCN33_EN_0_SHIFT,
|
|
MT6357_DA_VCN33_EN_ADDR, MT6357_RG_VCN33_VOSEL_ADDR,
|
|
MT6357_RG_VCN33_VOSEL_MASK <<
|
|
MT6357_RG_VCN33_VOSEL_SHIFT,
|
|
MT6357_RG_VCN33_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VCN33_OC_ADDR, MT6357_RG_INT_MASK_VCN33_OC_SHIFT),
|
|
MT6357_LDO("ldo_vcn33_wifi", VCN33_WIFI, vcn33_wifi_voltages,
|
|
vcn33_wifi_idx, MT6357_RG_LDO_VCN33_EN_1_ADDR,
|
|
MT6357_RG_LDO_VCN33_EN_1_SHIFT,
|
|
MT6357_DA_VCN33_EN_ADDR,
|
|
MT6357_RG_VCN33_VOSEL_ADDR,
|
|
MT6357_RG_VCN33_VOSEL_MASK <<
|
|
MT6357_RG_VCN33_VOSEL_SHIFT,
|
|
MT6357_RG_VCN33_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VCN33_OC_ADDR, MT6357_RG_INT_MASK_VCN33_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vcn28", VCN28, MT6357_RG_LDO_VCN28_EN_ADDR,
|
|
MT6357_DA_VCN28_EN_ADDR, 2800000,
|
|
MT6357_RG_INT_MASK_VCN28_OC_ADDR, MT6357_RG_INT_MASK_VCN28_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vcn18", VCN18, MT6357_RG_LDO_VCN18_EN_ADDR,
|
|
MT6357_DA_VCN18_EN_ADDR, 1800000,
|
|
MT6357_RG_INT_MASK_VCN18_OC_ADDR, MT6357_RG_INT_MASK_VCN18_OC_SHIFT),
|
|
MT6357_LDO("ldo_vcama", VCAMA, vcama_voltages, vcama_idx,
|
|
MT6357_RG_LDO_VCAMA_EN_ADDR, MT6357_RG_LDO_VCAMA_EN_SHIFT,
|
|
MT6357_DA_VCAMA_EN_ADDR, MT6357_RG_VCAMA_VOSEL_ADDR,
|
|
MT6357_RG_VCAMA_VOSEL_MASK << MT6357_RG_VCAMA_VOSEL_SHIFT,
|
|
MT6357_RG_VCAMA_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VCAMA_OC_ADDR, MT6357_RG_INT_MASK_VCAMA_OC_SHIFT),
|
|
MT6357_LDO("ldo_vcamd", VCAMD, vcamd_voltages, vcamd_idx,
|
|
MT6357_RG_LDO_VCAMD_EN_ADDR, MT6357_RG_LDO_VCAMD_EN_SHIFT,
|
|
MT6357_DA_VCAMD_EN_ADDR, MT6357_RG_VCAMD_VOSEL_ADDR,
|
|
MT6357_RG_VCAMD_VOSEL_MASK << MT6357_RG_VCAMD_VOSEL_SHIFT,
|
|
MT6357_RG_VCAMD_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VCAMD_OC_ADDR, MT6357_RG_INT_MASK_VCAMD_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vcamio", VCAMIO, MT6357_RG_LDO_VCAMIO_EN_ADDR,
|
|
MT6357_DA_VCAMIO_EN_ADDR, 1800000,
|
|
MT6357_RG_INT_MASK_VCAMIO_OC_ADDR, MT6357_RG_INT_MASK_VCAMIO_OC_SHIFT),
|
|
MT6357_LDO("ldo_vldo28", VLDO28, vldo28_voltages, vldo28_idx,
|
|
MT6357_RG_LDO_VLDO28_EN_0_ADDR,
|
|
MT6357_RG_LDO_VLDO28_EN_1_SHIFT,
|
|
MT6357_DA_VLDO28_EN_ADDR, MT6357_RG_VLDO28_VOSEL_ADDR,
|
|
MT6357_RG_VLDO28_VOSEL_MASK << MT6357_RG_VLDO28_VOSEL_SHIFT,
|
|
MT6357_RG_VLDO28_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VLDO28_OC_ADDR, MT6357_RG_INT_MASK_VLDO28_OC_SHIFT),
|
|
MT6357_LDO_LINEAR("ldo_vsram_others", VSRAM_OTHERS, 518750, 1312500,
|
|
6250, 0, mt_volt_range2,
|
|
MT6357_RG_LDO_VSRAM_OTHERS_EN_ADDR,
|
|
MT6357_DA_VSRAM_OTHERS_EN_ADDR,
|
|
MT6357_DA_VSRAM_OTHERS_VOSEL_ADDR,
|
|
MT6357_DA_VSRAM_OTHERS_VOSEL_MASK,
|
|
MT6357_DA_VSRAM_OTHERS_VOSEL_SHIFT,
|
|
MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR,
|
|
MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_MASK <<
|
|
MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VSRAM_OTHERS_OC_ADDR,
|
|
MT6357_RG_INT_MASK_VSRAM_OTHERS_OC_SHIFT),
|
|
MT6357_LDO_LINEAR("ldo_vsram_proc", VSRAM_PROC, 518750, 1312500, 6250,
|
|
0, mt_volt_range2, MT6357_RG_LDO_VSRAM_PROC_EN_ADDR,
|
|
MT6357_DA_VSRAM_PROC_EN_ADDR,
|
|
MT6357_DA_VSRAM_PROC_VOSEL_ADDR,
|
|
MT6357_DA_VSRAM_PROC_VOSEL_MASK,
|
|
MT6357_DA_VSRAM_PROC_VOSEL_SHIFT,
|
|
MT6357_RG_LDO_VSRAM_PROC_VOSEL_ADDR,
|
|
MT6357_RG_LDO_VSRAM_PROC_VOSEL_MASK <<
|
|
MT6357_RG_LDO_VSRAM_PROC_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VSRAM_PROC_OC_ADDR,
|
|
MT6357_RG_INT_MASK_VSRAM_PROC_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vaux18", VAUX18, MT6357_RG_LDO_VAUX18_EN_ADDR,
|
|
MT6357_DA_VAUX18_EN_ADDR, 1800000,
|
|
MT6357_RG_INT_MASK_VAUX18_OC_ADDR, MT6357_RG_INT_MASK_VAUX18_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vaud28", VAUD28, MT6357_RG_LDO_VAUD28_EN_ADDR,
|
|
MT6357_DA_VAUD28_EN_ADDR, 2800000,
|
|
MT6357_RG_INT_MASK_VAUD28_OC_ADDR, MT6357_RG_INT_MASK_VAUD28_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vio28", VIO28, MT6357_RG_LDO_VIO28_EN_ADDR,
|
|
MT6357_DA_VIO28_EN_ADDR, 2800000,
|
|
MT6357_RG_INT_MASK_VIO28_OC_ADDR, MT6357_RG_INT_MASK_VIO28_OC_SHIFT),
|
|
MT6357_REG_FIXED("ldo_vio18", VIO18, MT6357_RG_LDO_VIO18_EN_ADDR,
|
|
MT6357_DA_VIO18_EN_ADDR, 1800000,
|
|
MT6357_RG_INT_MASK_VIO18_OC_ADDR, MT6357_RG_INT_MASK_VIO18_OC_SHIFT),
|
|
MT6357_LDO("ldo_vdram", VDRAM, vdram_voltages, vdram_idx,
|
|
MT6357_RG_LDO_VDRAM_EN_ADDR, MT6357_RG_LDO_VDRAM_EN_SHIFT,
|
|
MT6357_DA_VDRAM_EN_ADDR, MT6357_RG_VDRAM_VOSEL_ADDR,
|
|
MT6357_RG_VDRAM_VOSEL_MASK << MT6357_RG_VDRAM_VOSEL_SHIFT,
|
|
MT6357_RG_VDRAM_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VDRAM_OC_ADDR, MT6357_RG_INT_MASK_VDRAM_OC_SHIFT),
|
|
MT6357_LDO_VMC_DESC("ldo_vmc", VMC, mt_volt_range5, MT6357_RG_LDO_VMC_EN_ADDR,
|
|
MT6357_DA_VMC_EN_ADDR, MT6357_RG_VMC_VOSEL_ADDR, 0xFFF,
|
|
MT6357_RG_INT_MASK_VMC_OC_ADDR, MT6357_RG_INT_MASK_VMC_OC_SHIFT),
|
|
MT6357_LDO("ldo_vmch", VMCH, vmch_voltages, vmch_idx,
|
|
MT6357_RG_LDO_VMCH_EN_ADDR, MT6357_RG_LDO_VMCH_EN_SHIFT,
|
|
MT6357_DA_VMCH_EN_ADDR, MT6357_RG_VMCH_VOSEL_ADDR,
|
|
MT6357_RG_VMCH_VOSEL_MASK << MT6357_RG_VMCH_VOSEL_SHIFT,
|
|
MT6357_RG_VMCH_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VMCH_OC_ADDR, MT6357_RG_INT_MASK_VMCH_OC_SHIFT),
|
|
MT6357_LDO("ldo_vemc", VEMC, vemc_voltages, vemc_idx,
|
|
MT6357_RG_LDO_VEMC_EN_ADDR, MT6357_RG_LDO_VEMC_EN_SHIFT,
|
|
MT6357_DA_VEMC_EN_ADDR, MT6357_RG_VEMC_VOSEL_ADDR,
|
|
MT6357_RG_VEMC_VOSEL_MASK << MT6357_RG_VEMC_VOSEL_SHIFT,
|
|
MT6357_RG_VEMC_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VEMC_OC_ADDR, MT6357_RG_INT_MASK_VEMC_OC_SHIFT),
|
|
MT6357_LDO("ldo_vsim1", VSIM1, vsim1_voltages, vsim1_idx,
|
|
MT6357_RG_LDO_VSIM1_EN_ADDR, MT6357_RG_LDO_VSIM1_EN_SHIFT,
|
|
MT6357_DA_VSIM1_EN_ADDR, MT6357_RG_VSIM1_VOSEL_ADDR,
|
|
MT6357_RG_VSIM1_VOSEL_MASK << MT6357_RG_VSIM1_VOSEL_SHIFT,
|
|
MT6357_RG_VSIM1_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VSIM1_OC_ADDR, MT6357_RG_INT_MASK_VSIM1_OC_SHIFT),
|
|
MT6357_LDO("ldo_vsim2", VSIM2, vsim2_voltages, vsim2_idx,
|
|
MT6357_RG_LDO_VSIM2_EN_ADDR, MT6357_RG_LDO_VSIM2_EN_SHIFT,
|
|
MT6357_DA_VSIM2_EN_ADDR, MT6357_RG_VSIM2_VOSEL_ADDR,
|
|
MT6357_RG_VSIM2_VOSEL_MASK << MT6357_RG_VSIM2_VOSEL_SHIFT,
|
|
MT6357_RG_VSIM2_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VSIM2_OC_ADDR, MT6357_RG_INT_MASK_VSIM2_OC_SHIFT),
|
|
MT6357_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx,
|
|
MT6357_RG_LDO_VIBR_EN_ADDR, MT6357_RG_LDO_VIBR_EN_SHIFT,
|
|
MT6357_DA_VIBR_EN_ADDR, MT6357_RG_VIBR_VOSEL_ADDR,
|
|
MT6357_RG_VIBR_VOSEL_MASK << MT6357_RG_VIBR_VOSEL_SHIFT,
|
|
MT6357_RG_VIBR_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VIBR_OC_ADDR, MT6357_RG_INT_MASK_VIBR_OC_SHIFT),
|
|
MT6357_LDO("ldo_vusb33", VUSB33, vusb33_voltages, vusb33_idx,
|
|
MT6357_RG_LDO_VUSB33_EN_0_ADDR,
|
|
MT6357_RG_LDO_VUSB33_EN_0_SHIFT,
|
|
MT6357_DA_VUSB33_EN_ADDR, MT6357_RG_VUSB33_VOSEL_ADDR,
|
|
MT6357_RG_VUSB33_VOSEL_MASK << MT6357_RG_VUSB33_VOSEL_SHIFT,
|
|
MT6357_RG_VUSB33_VOSEL_SHIFT,
|
|
MT6357_RG_INT_MASK_VUSB33_OC_ADDR, MT6357_RG_INT_MASK_VUSB33_OC_SHIFT),
|
|
};
|
|
|
|
static unsigned int is_mt6357_pmic_mrv(struct regmap *regmap)
|
|
{
|
|
unsigned int is_mrv = 0;
|
|
|
|
regmap_read(regmap, MT6357_RG_TOP2_RSV0_ADDR, &is_mrv);
|
|
is_mrv = (is_mrv & 0x8000) >> 15;
|
|
|
|
return is_mrv;
|
|
}
|
|
|
|
static void mt6357_oc_irq_enable_work(struct work_struct *work)
|
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{
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struct delayed_work *dwork = to_delayed_work(work);
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struct mt6357_regulator_info *info
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= container_of(dwork, struct mt6357_regulator_info, oc_work);
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enable_irq(info->irq);
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}
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static irqreturn_t mt6357_oc_irq(int irq, void *data)
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{
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struct regulator_dev *rdev = (struct regulator_dev *)data;
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struct mt6357_regulator_info *info = rdev_get_drvdata(rdev);
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disable_irq_nosync(info->irq);
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if (!regulator_is_enabled_regmap(rdev))
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goto delayed_enable;
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mutex_lock(&rdev->mutex);
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regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_CURRENT,
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NULL);
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mutex_unlock(&rdev->mutex);
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delayed_enable:
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schedule_delayed_work(&info->oc_work,
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msecs_to_jiffies(info->oc_irq_enable_delay_ms));
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return IRQ_HANDLED;
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}
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static int mt6357_of_parse_cb(struct device_node *np,
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const struct regulator_desc *desc,
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struct regulator_config *config)
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{
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int ret = 0;
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struct mt6357_regulator_info *info = config->driver_data;
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ret = of_property_read_u32(np, "mediatek,oc-irq-enable-delay-ms",
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&info->oc_irq_enable_delay_ms);
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if (ret || !info->oc_irq_enable_delay_ms)
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info->oc_irq_enable_delay_ms = DEF_OC_IRQ_ENABLE_DELAY_MS;
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return 0;
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}
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static int mt6357_regulator_probe(struct platform_device *pdev)
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{
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struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
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struct regulator_config config = {};
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struct regulator_dev *rdev;
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int i = 0, ret = 0;
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for (i = 0; i < MT6357_MAX_REGULATOR; i++) {
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/* Workaround setting for MT6357 MRV */
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if (is_mt6357_pmic_mrv(mt6397->regmap)) {
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if (strncmp(mt6357_regulators[i].desc.name,
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"VSRAM_OTHERS", 12) == 0) {
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mt6357_regulators[i].desc.enable_reg =
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MT6357_RG_LDO_VSRAM_PROC_EN_ADDR;
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mt6357_regulators[i].status_reg =
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MT6357_DA_VSRAM_PROC_EN_ADDR;
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mt6357_regulators[i].da_vsel_reg =
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MT6357_DA_VSRAM_PROC_VOSEL_ADDR;
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mt6357_regulators[i].da_vsel_mask =
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MT6357_DA_VSRAM_PROC_VOSEL_MASK;
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mt6357_regulators[i].da_vsel_shift =
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MT6357_DA_VSRAM_PROC_VOSEL_SHIFT;
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mt6357_regulators[i].desc.vsel_reg =
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MT6357_RG_LDO_VSRAM_PROC_VOSEL_ADDR;
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mt6357_regulators[i].desc.vsel_mask =
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MT6357_RG_LDO_VSRAM_PROC_VOSEL_MASK <<
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MT6357_RG_LDO_VSRAM_PROC_VOSEL_SHIFT;
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} else if (strncmp(mt6357_regulators[i].desc.name,
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"VSRAM_PROC", 10) == 0) {
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mt6357_regulators[i].desc.enable_reg =
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MT6357_RG_LDO_VSRAM_OTHERS_EN_ADDR;
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mt6357_regulators[i].status_reg =
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MT6357_DA_VSRAM_OTHERS_EN_ADDR;
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mt6357_regulators[i].da_vsel_reg =
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MT6357_DA_VSRAM_OTHERS_VOSEL_ADDR;
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mt6357_regulators[i].da_vsel_mask =
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MT6357_DA_VSRAM_OTHERS_VOSEL_MASK;
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mt6357_regulators[i].da_vsel_shift =
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MT6357_DA_VSRAM_OTHERS_VOSEL_SHIFT;
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mt6357_regulators[i].desc.vsel_reg =
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MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_ADDR;
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mt6357_regulators[i].desc.vsel_mask =
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MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_MASK <<
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MT6357_RG_LDO_VSRAM_OTHERS_VOSEL_SHIFT;
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}
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}
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mt6357_regulators[i].desc.of_parse_cb = mt6357_of_parse_cb;
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config.dev = &pdev->dev;
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config.driver_data = &mt6357_regulators[i];
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config.regmap = mt6397->regmap;
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rdev = devm_regulator_register(&pdev->dev,
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&mt6357_regulators[i].desc,
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&config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "failed to register %s\n",
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mt6357_regulators[i].desc.name);
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return PTR_ERR(rdev);
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}
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mt6357_regulators[i].irq =
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platform_get_irq_byname(pdev,
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mt6357_regulators[i].desc.name);
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if (mt6357_regulators[i].irq < 0)
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continue;
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ret = devm_request_threaded_irq(&pdev->dev,
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mt6357_regulators[i].irq, NULL,
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mt6357_oc_irq,
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IRQF_TRIGGER_HIGH,
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mt6357_regulators[i].desc.name,
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rdev);
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if (ret) {
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dev_notice(&pdev->dev, "Failed to request IRQ:%s,%d",
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mt6357_regulators[i].desc.name, ret);
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continue;
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}
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INIT_DELAYED_WORK(&mt6357_regulators[i].oc_work,
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mt6357_oc_irq_enable_work);
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}
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return 0;
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}
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static const struct platform_device_id mt6357_platform_ids[] = {
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{"mt6357-regulator", 0},
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(platform, mt6357_platform_ids);
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static struct platform_driver mt6357_regulator_driver = {
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.driver = {
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.name = "mt6357-regulator",
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},
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.probe = mt6357_regulator_probe,
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.id_table = mt6357_platform_ids,
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};
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module_platform_driver(mt6357_regulator_driver);
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MODULE_AUTHOR("Wen Su <wen.su@mediatek.com>");
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MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6357 PMIC");
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MODULE_LICENSE("GPL");
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