555 lines
16 KiB
C
555 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Michael Hsiao <michael.hsiao@mediatek.com>
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*/
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/*******************************************************************************
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*
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* Filename:
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* ---------
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* uldlloopback.c
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*
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* Project:
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* --------
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* MT6595 Audio Driver Kernel Function
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*
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* Description:
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* ------------
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* Audio uldlloopback
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*
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* Author:
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* -------
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* Chipeng Chang
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*
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*------------------------------------------------------------------------------
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*
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*
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******************************************************************************
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*/
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/*****************************************************************************
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* C O M P I L E R F L A G S
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*****************************************************************************/
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/*****************************************************************************
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* E X T E R N A L R E F E R E N C E S
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*****************************************************************************/
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#include "mtk-auddrv-afe.h"
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#include "mtk-auddrv-ana.h"
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#include "mtk-auddrv-clk.h"
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#include "mtk-auddrv-common.h"
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#include "mtk-auddrv-def.h"
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#include "mtk-auddrv-kernel.h"
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#include "mtk-soc-afe-control.h"
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#include "mtk-soc-analog-type.h"
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#include "mtk-soc-digital-type.h"
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#include "mtk-soc-pcm-common.h"
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#include "mtk-soc-pcm-platform.h"
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#include <linux/dma-mapping.h>
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/*
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* function implementation
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*/
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static int m_input_use_single_ch;
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static int m_input_use_lch;
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static const char *const LR_channel_switch[] = {"Off", "Left", "Right"};
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static const char *const switch_texts[] = {"Off", "On"};
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static const struct soc_enum input_use_sigle_ch_enum[] = {
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SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(LR_channel_switch), LR_channel_switch),
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SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(switch_texts), switch_texts),
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};
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static int lpbk_in_use_lch_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("m_input_use_lch = %d\n", m_input_use_lch);
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ucontrol->value.integer.value[0] = m_input_use_lch;
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return 0;
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}
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static int lpbk_in_use_lch_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("%s()\n", __func__);
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if (ucontrol->value.enumerated.item[0] > ARRAY_SIZE(switch_texts)) {
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pr_err("return -EINVAL\n");
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return -EINVAL;
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}
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m_input_use_lch = ucontrol->value.integer.value[0];
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return 0;
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}
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static int lpbk_in_use_single_ch_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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pr_debug("m_input_use_single_ch = %d\n", m_input_use_single_ch);
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ucontrol->value.integer.value[0] = m_input_use_single_ch;
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return 0;
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}
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static int lpbk_in_use_single_ch_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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m_input_use_single_ch = ucontrol->value.integer.value[0];
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pr_debug("%s(), m_input_use_single_ch = %d\n", __func__,
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m_input_use_single_ch);
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AudDrv_Clk_On();
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switch (m_input_use_single_ch) {
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case 0:
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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break;
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case 1:
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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break;
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case 2:
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_RCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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break;
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default:
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pr_err("%s, control error, return -EINVAL\n", __func__);
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AudDrv_Clk_Off();
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return -EINVAL;
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}
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AudDrv_Clk_Off();
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return 0;
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}
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static const struct snd_kcontrol_new lpbk_controls[] = {
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SOC_ENUM_EXT("loopback_use_single_input", input_use_sigle_ch_enum[0],
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lpbk_in_use_single_ch_get, lpbk_in_use_single_ch_set),
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SOC_ENUM_EXT("LPBK_IN_USE_LCH", input_use_sigle_ch_enum[1],
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lpbk_in_use_lch_get, lpbk_in_use_lch_set),
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};
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static int mtk_uldlloopback_probe(struct platform_device *pdev);
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static int mtk_uldlloopbackpcm_close(struct snd_pcm_substream *substream);
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static int mtk_afe_uldlloopback_component_probe(struct snd_soc_component *component);
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static struct snd_pcm_hardware mtk_uldlloopback_hardware = {
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.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID),
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.formats = SND_SOC_STD_MT_FMTS,
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.rates = SOC_HIGH_USE_RATE,
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.rate_min = SOC_NORMAL_USE_RATE_MIN,
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.rate_max = SOC_NORMAL_USE_RATE_MAX,
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.channels_min = SOC_NORMAL_USE_CHANNELS_MIN,
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.channels_max = SOC_NORMAL_USE_CHANNELS_MAX,
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.buffer_bytes_max = Dl1_MAX_BUFFER_SIZE,
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.period_bytes_max = MAX_PERIOD_SIZE,
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.periods_min = MIN_PERIOD_SIZE,
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.periods_max = MAX_PERIOD_SIZE,
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.fifo_size = 0,
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};
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static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
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.count = ARRAY_SIZE(soc_high_supported_sample_rates),
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.list = soc_high_supported_sample_rates,
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.mask = 0,
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};
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static int mtk_uldlloopback_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret = 0;
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pr_debug("%s, stream = %s\n", __func__,
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substream->stream == SNDRV_PCM_STREAM_PLAYBACK
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? "SNDRV_PCM_STREAM_PLAYBACK"
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: "SNDRV_PCM_STREAM_CAPTURE");
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AudDrv_Clk_On();
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runtime->hw = mtk_uldlloopback_hardware;
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memcpy((void *)(&(runtime->hw)), (void *)&mtk_uldlloopback_hardware,
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sizeof(struct snd_pcm_hardware));
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ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
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&constraints_sample_rates);
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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/* print for hw pcm information */
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pr_debug("mtk_uldlloopback_open runtime rate = %d channels = %d\n",
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runtime->rate, runtime->channels);
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runtime->hw.info |= SNDRV_PCM_INFO_INTERLEAVED;
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runtime->hw.info |= SNDRV_PCM_INFO_NONINTERLEAVED;
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if (ret < 0) {
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pr_err("mtk_uldlloopbackpcm_close\n");
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mtk_uldlloopbackpcm_close(substream);
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return ret;
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}
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return 0;
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}
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static int mtk_uldlloopbackpcm_close(struct snd_pcm_substream *substream)
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{
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pr_debug("%s\n", __func__);
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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pr_err("%s with SNDRV_PCM_STREAM_CAPTURE\n", __func__);
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AudDrv_Clk_Off();
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return 0;
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}
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/* interconnection setting */
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_DisConnect,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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SetMemoryPathEnable(Soc_Aud_Digital_Block_ADDA_UL, false);
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if (GetMemoryPathEnable(Soc_Aud_Digital_Block_ADDA_UL) == false)
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set_adc_enable(false);
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/* stop DAC output */
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SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, false);
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if (GetI2SDacEnable() == false)
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SetI2SDacEnable(false);
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/* stop I2S */
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Afe_Set_Reg(AFE_I2S_CON3, 0x0, 0x1);
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Afe_Set_Reg(AFE_I2S_CON, 0x0, 0x1);
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Afe_Set_Reg(AFE_I2S_CON1, 0x0, 0x1);
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Afe_Set_Reg(AFE_I2S_CON2, 0x0, 0x1);
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EnableAfe(false);
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AudDrv_Clk_Off();
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return 0;
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}
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static int mtk_uldlloopbackpcm_trigger(struct snd_pcm_substream *substream,
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int cmd)
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{
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pr_debug("%s cmd = %d\n", __func__, cmd);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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break;
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}
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return -EINVAL;
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}
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static int mtk_uldlloopback_pcm_copy(struct snd_pcm_substream *substream,
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int channel,
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unsigned long pos,
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void __user *buf,
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unsigned long bytes)
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{
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return 0;
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}
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static int mtk_uldlloopback_silence(struct snd_pcm_substream *substream,
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int channel,
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unsigned long pos,
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unsigned long bytes)
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{
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return 0; /* do nothing */
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}
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static void *dummy_page[2];
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static struct page *mtk_uldlloopback_page(struct snd_pcm_substream *substream,
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unsigned long offset)
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{
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return virt_to_page(dummy_page[substream->stream]); /* the same page */
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}
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static int mtk_uldlloopback_pcm_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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/* unsigned int eSamplingRate = SampleRateTransform(runtime->rate); */
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/* unsigned int dVoiceModeSelect = 0; */
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/* unsigned int Audio_I2S_Dac = 0; */
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unsigned int u32AudioI2S = 0;
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bool mI2SWLen;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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pr_debug("%s SNDRV_PCM_STREAM_CAPTURE return\n", __func__);
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return 0;
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}
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pr_debug("%s rate = %d\n", __func__, runtime->rate);
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Afe_Set_Reg(AFE_TOP_CON0, 0x00000000, 0xffffffff);
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if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
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runtime->format == SNDRV_PCM_FORMAT_U32_LE) {
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SetMemIfFetchFormatPerSample(
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Soc_Aud_Digital_Block_MEM_DL1,
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AFE_WLEN_32_BIT_ALIGN_8BIT_0_24BIT_DATA);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_24BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_32BITS;
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} else {
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SetMemIfFetchFormatPerSample(Soc_Aud_Digital_Block_MEM_DL1,
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AFE_WLEN_16_BIT);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetConnectionFormat(OUTPUT_DATA_FORMAT_16BIT,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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mI2SWLen = Soc_Aud_I2S_WLEN_WLEN_16BITS;
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}
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/* interconnection setting */
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if (m_input_use_lch == 1) {
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL_LCH,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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} else {
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S3);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S1_DAC);
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SetIntfConnection(Soc_Aud_InterCon_Connection,
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Soc_Aud_AFE_IO_Block_ADDA_UL,
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Soc_Aud_AFE_IO_Block_I2S1_DAC_2);
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}
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Afe_Set_Reg(AFE_ADDA_TOP_CON0, 0, 0x1); /* Using Internal ADC */
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u32AudioI2S |= Soc_Aud_LOW_JITTER_CLOCK << 12; /* Low jitter mode */
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u32AudioI2S |= SampleRateTransform(runtime->rate,
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Soc_Aud_Digital_Block_I2S_OUT_2)
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<< 8;
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u32AudioI2S |= Soc_Aud_I2S_FORMAT_I2S << 3; /* us3 I2s format */
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u32AudioI2S |= mI2SWLen << 1;
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pr_debug("u32AudioI2S= 0x%x\n", u32AudioI2S);
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Afe_Set_Reg(AFE_I2S_CON3, u32AudioI2S | 1, AFE_MASK_ALL);
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/* start I2S DAC out */
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if (GetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC) == false) {
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SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
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SetI2SDacOut(substream->runtime->rate, false, mI2SWLen);
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SetI2SDacEnable(true);
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} else
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SetMemoryPathEnable(Soc_Aud_Digital_Block_I2S_OUT_DAC, true);
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if (GetMemoryPathEnable(Soc_Aud_Digital_Block_ADDA_UL) == false) {
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SetMemoryPathEnable(Soc_Aud_Digital_Block_ADDA_UL, true);
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set_adc_in(substream->runtime->rate);
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set_adc_enable(true);
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} else
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SetMemoryPathEnable(Soc_Aud_Digital_Block_ADDA_UL, true);
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EnableAfe(true);
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return 0;
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}
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static int mtk_uldlloopback_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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int ret = 0;
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return ret;
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}
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static int mtk_uldlloopback_pcm_hw_free(struct snd_pcm_substream *substream)
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{
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return snd_pcm_lib_free_pages(substream);
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}
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static struct snd_pcm_ops mtk_afe_ops = {
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.open = mtk_uldlloopback_open,
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.close = mtk_uldlloopbackpcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = mtk_uldlloopback_pcm_hw_params,
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.hw_free = mtk_uldlloopback_pcm_hw_free,
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.prepare = mtk_uldlloopback_pcm_prepare,
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.trigger = mtk_uldlloopbackpcm_trigger,
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.copy_user = mtk_uldlloopback_pcm_copy,
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.fill_silence = mtk_uldlloopback_silence,
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.page = mtk_uldlloopback_page,
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};
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static struct snd_soc_component_driver mtk_soc_dummy_component = {
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.name = AFE_PCM_NAME,
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.ops = &mtk_afe_ops,
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.probe = mtk_afe_uldlloopback_component_probe,
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};
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|
|
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static int mtk_uldlloopback_probe(struct platform_device *pdev)
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{
|
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pr_debug("%s\n", __func__);
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|
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pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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if (!pdev->dev.dma_mask)
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pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
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|
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if (pdev->dev.of_node)
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dev_set_name(&pdev->dev, "%s", MT_SOC_ULDLLOOPBACK_PCM);
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pdev->name = pdev->dev.kobj.name;
|
|
|
|
pr_debug("%s: dev name %s\n", __func__, dev_name(&pdev->dev));
|
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return snd_soc_register_component(&pdev->dev,
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&mtk_soc_dummy_component,
|
|
NULL,
|
|
0);
|
|
}
|
|
|
|
static int mtk_afe_uldlloopback_component_probe(struct snd_soc_component *component)
|
|
{
|
|
pr_debug("%s\n", __func__);
|
|
|
|
snd_soc_add_component_controls(component, lpbk_controls,
|
|
ARRAY_SIZE(lpbk_controls));
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|
return 0;
|
|
}
|
|
|
|
static int mtk_afe_uldlloopback_remove(struct platform_device *pdev)
|
|
{
|
|
pr_debug("%s\n", __func__);
|
|
snd_soc_unregister_component(&pdev->dev);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id mt_soc_pcm_uldlloopback_of_ids[] = {
|
|
{
|
|
.compatible = "mediatek,mt_soc_pcm_uldlloopback",
|
|
},
|
|
{} };
|
|
#endif
|
|
|
|
static struct platform_driver mtk_afe_uldllopback_driver = {
|
|
.driver = {
|
|
|
|
.name = MT_SOC_ULDLLOOPBACK_PCM,
|
|
.owner = THIS_MODULE,
|
|
#ifdef CONFIG_OF
|
|
.of_match_table = mt_soc_pcm_uldlloopback_of_ids,
|
|
#endif
|
|
},
|
|
.probe = mtk_uldlloopback_probe,
|
|
.remove = mtk_afe_uldlloopback_remove,
|
|
};
|
|
|
|
#ifndef CONFIG_OF
|
|
static struct platform_device *soc_mtkafe_uldlloopback_dev;
|
|
#endif
|
|
|
|
static int __init mtk_soc_uldlloopback_platform_init(void)
|
|
{
|
|
int ret = 0;
|
|
|
|
pr_debug("%s\n", __func__);
|
|
#ifndef CONFIG_OF
|
|
soc_mtkafe_uldlloopback_dev =
|
|
platform_device_alloc(MT_SOC_ULDLLOOPBACK_PCM, -1);
|
|
if (!soc_mtkafe_uldlloopback_dev)
|
|
return -ENOMEM;
|
|
|
|
ret = platform_device_add(soc_mtkafe_uldlloopback_dev);
|
|
if (ret != 0) {
|
|
platform_device_put(soc_mtkafe_uldlloopback_dev);
|
|
return ret;
|
|
}
|
|
#endif
|
|
ret = platform_driver_register(&mtk_afe_uldllopback_driver);
|
|
|
|
return ret;
|
|
}
|
|
module_init(mtk_soc_uldlloopback_platform_init);
|
|
|
|
static void __exit mtk_soc_uldlloopback_platform_exit(void)
|
|
{
|
|
|
|
platform_driver_unregister(&mtk_afe_uldllopback_driver);
|
|
}
|
|
module_exit(mtk_soc_uldlloopback_platform_exit);
|
|
|
|
MODULE_DESCRIPTION("loopback module platform driver");
|
|
MODULE_LICENSE("GPL");
|