175 lines
6.9 KiB
C
175 lines
6.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __MTK_DVFSRC_REG_MT6768_H
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#define __MTK_DVFSRC_REG_MT6768_H
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/**************************************
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* Define and Declare
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**************************************/
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#define DVFSRC_BASIC_CONTROL (0x0)
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#define DVFSRC_SW_REQ (0x4)
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#define DVFSRC_SW_REQ2 (0x8)
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#define DVFSRC_EMI_REQUEST (0xC)
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#define DVFSRC_EMI_REQUEST2 (0x10)
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#define DVFSRC_EMI_REQUEST3 (0x14)
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#define DVFSRC_EMI_HRT (0x18)
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#define DVFSRC_EMI_HRT2 (0x1C)
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#define DVFSRC_EMI_HRT3 (0x20)
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#define DVFSRC_EMI_QOS0 (0x24)
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#define DVFSRC_EMI_QOS1 (0x28)
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#define DVFSRC_EMI_QOS2 (0x2C)
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#define DVFSRC_EMI_MD2SPM0 (0x30)
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#define DVFSRC_EMI_MD2SPM1 (0x34)
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#define DVFSRC_EMI_MD2SPM2 (0x38)
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#define DVFSRC_EMI_MD2SPM0_T (0x3C)
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#define DVFSRC_EMI_MD2SPM1_T (0x40)
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#define DVFSRC_EMI_MD2SPM2_T (0x44)
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#define DVFSRC_VCORE_REQUEST (0x48)
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#define DVFSRC_VCORE_REQUEST2 (0x4C)
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#define DVFSRC_VCORE_HRT (0x50)
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#define DVFSRC_VCORE_HRT2 (0x54)
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#define DVFSRC_VCORE_HRT3 (0x58)
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#define DVFSRC_VCORE_QOS0 (0x5C)
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#define DVFSRC_VCORE_QOS1 (0x60)
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#define DVFSRC_VCORE_QOS2 (0x64)
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#define DVFSRC_VCORE_MD2SPM0 (0x68)
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#define DVFSRC_VCORE_MD2SPM1 (0x6C)
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#define DVFSRC_VCORE_MD2SPM2 (0x70)
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#define DVFSRC_VCORE_MD2SPM0_T (0x74)
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#define DVFSRC_VCORE_MD2SPM1_T (0x78)
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#define DVFSRC_VCORE_MD2SPM2_T (0x7C)
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#define DVFSRC_MD_REQUEST (0x80)
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#define DVFSRC_MD_SW_CONTROL (0x84)
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#define DVFSRC_MD_VMODEM_REMAP (0x88)
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#define DVFSRC_MD_VMD_REMAP (0x8C)
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#define DVFSRC_MD_VSRAM_REMAP (0x90)
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#define DVFSRC_HALT_SW_CONTROL (0x94)
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#define DVFSRC_INT (0x98)
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#define DVFSRC_INT_EN (0x9C)
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#define DVFSRC_INT_CLR (0xA0)
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#define DVFSRC_BW_MON_WINDOW (0xA4)
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#define DVFSRC_BW_MON_THRES_1 (0xA8)
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#define DVFSRC_BW_MON_THRES_2 (0xAC)
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#define DVFSRC_MD_TURBO (0xB0)
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#define DVFSRC_DEBOUNCE_FOUR (0xD0)
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#define DVFSRC_DEBOUNCE_RISE_FALL (0xD4)
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#define DVFSRC_TIMEOUT_NEXTREQ (0xD8)
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#define DVFSRC_LEVEL (0xDC)
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#define DVFSRC_LEVEL_LABEL_0_1 (0xE0)
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#define DVFSRC_LEVEL_LABEL_2_3 (0xE4)
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#define DVFSRC_LEVEL_LABEL_4_5 (0xE8)
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#define DVFSRC_LEVEL_LABEL_6_7 (0xEC)
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#define DVFSRC_LEVEL_LABEL_8_9 (0xF0)
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#define DVFSRC_LEVEL_LABEL_10_11 (0xF4)
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#define DVFSRC_LEVEL_LABEL_12_13 (0xF8)
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#define DVFSRC_LEVEL_LABEL_14_15 (0xFC)
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#define DVFSRC_MM_BW_0 (0x100)
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#define DVFSRC_MM_BW_1 (0x104)
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#define DVFSRC_MM_BW_2 (0x108)
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#define DVFSRC_MM_BW_3 (0x10C)
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#define DVFSRC_MM_BW_4 (0x110)
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#define DVFSRC_MM_BW_5 (0x114)
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#define DVFSRC_MM_BW_6 (0x118)
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#define DVFSRC_MM_BW_7 (0x11C)
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#define DVFSRC_MM_BW_8 (0x120)
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#define DVFSRC_MM_BW_9 (0x124)
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#define DVFSRC_MM_BW_10 (0x128)
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#define DVFSRC_MM_BW_11 (0x12C)
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#define DVFSRC_MM_BW_12 (0x130)
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#define DVFSRC_MM_BW_13 (0x134)
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#define DVFSRC_MM_BW_14 (0x138)
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#define DVFSRC_MM_BW_15 (0x13C)
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#define DVFSRC_MD_BW_0 (0x140)
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#define DVFSRC_MD_BW_1 (0x144)
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#define DVFSRC_MD_BW_2 (0x148)
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#define DVFSRC_MD_BW_3 (0x14C)
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#define DVFSRC_MD_BW_4 (0x150)
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#define DVFSRC_MD_BW_5 (0x154)
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#define DVFSRC_MD_BW_6 (0x158)
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#define DVFSRC_MD_BW_7 (0x15C)
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#define DVFSRC_SW_BW_0 (0x160)
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#define DVFSRC_SW_BW_1 (0x164)
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#define DVFSRC_SW_BW_2 (0x168)
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#define DVFSRC_SW_BW_3 (0x16C)
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#define DVFSRC_SW_BW_4 (0x170)
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#define DVFSRC_QOS_EN (0x180)
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#define DVFSRC_ISP_HRT (0x190)
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#define DVFSRC_FORCE (0x300)
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#define DVFSRC_SEC_SW_REQ (0x304)
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#define DVFSRC_LAST (0x308)
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#define DVFSRC_LAST_L (0x30C)
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#define DVFSRC_MD_SCENARIO (0X310)
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#define DVFSRC_RECORD_0_0 (0x400)
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#define DVFSRC_RECORD_0_1 (0x404)
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#define DVFSRC_RECORD_0_2 (0x408)
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#define DVFSRC_RECORD_1_0 (0x40C)
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#define DVFSRC_RECORD_1_1 (0x410)
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#define DVFSRC_RECORD_1_2 (0x414)
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#define DVFSRC_RECORD_2_0 (0x418)
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#define DVFSRC_RECORD_2_1 (0x41C)
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#define DVFSRC_RECORD_2_2 (0x420)
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#define DVFSRC_RECORD_3_0 (0x424)
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#define DVFSRC_RECORD_3_1 (0x428)
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#define DVFSRC_RECORD_3_2 (0x42C)
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#define DVFSRC_RECORD_4_0 (0x430)
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#define DVFSRC_RECORD_4_1 (0x434)
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#define DVFSRC_RECORD_4_2 (0x438)
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#define DVFSRC_RECORD_5_0 (0x43C)
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#define DVFSRC_RECORD_5_1 (0x440)
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#define DVFSRC_RECORD_5_2 (0x444)
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#define DVFSRC_RECORD_6_0 (0x448)
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#define DVFSRC_RECORD_6_1 (0x44C)
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#define DVFSRC_RECORD_6_2 (0x450)
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#define DVFSRC_RECORD_7_0 (0x454)
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#define DVFSRC_RECORD_7_1 (0x458)
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#define DVFSRC_RECORD_7_2 (0x45C)
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#define DVFSRC_RECORD_0_L_0 (0x460)
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#define DVFSRC_RECORD_0_L_1 (0x464)
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#define DVFSRC_RECORD_0_L_2 (0x468)
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#define DVFSRC_RECORD_1_L_0 (0x46C)
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#define DVFSRC_RECORD_1_L_1 (0x470)
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#define DVFSRC_RECORD_1_L_2 (0x474)
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#define DVFSRC_RECORD_2_L_0 (0x478)
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#define DVFSRC_RECORD_2_L_1 (0x47C)
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#define DVFSRC_RECORD_2_L_2 (0x480)
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#define DVFSRC_RECORD_3_L_0 (0x484)
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#define DVFSRC_RECORD_3_L_1 (0x488)
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#define DVFSRC_RECORD_3_L_2 (0x48C)
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#define DVFSRC_RECORD_4_L_0 (0x490)
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#define DVFSRC_RECORD_4_L_1 (0x494)
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#define DVFSRC_RECORD_4_L_2 (0x498)
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#define DVFSRC_RECORD_5_L_0 (0x49C)
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#define DVFSRC_RECORD_5_L_1 (0x4A0)
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#define DVFSRC_RECORD_5_L_2 (0x4A4)
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#define DVFSRC_RECORD_6_L_0 (0x4A8)
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#define DVFSRC_RECORD_6_L_1 (0x4AC)
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#define DVFSRC_RECORD_6_L_2 (0x4B0)
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#define DVFSRC_RECORD_7_L_0 (0x4B4)
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#define DVFSRC_RECORD_7_L_1 (0x4B8)
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#define DVFSRC_RECORD_7_L_2 (0x4BC)
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#define DVFSRC_RECORD_MD_0 (0x4C0)
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#define DVFSRC_RECORD_MD_1 (0x4C4)
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#define DVFSRC_RECORD_MD_2 (0x4C8)
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#define DVFSRC_RECORD_MD_3 (0x4CC)
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#define DVFSRC_RECORD_MD_4 (0x4D0)
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#define DVFSRC_RECORD_MD_5 (0x4D4)
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#define DVFSRC_RECORD_MD_6 (0x4D8)
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#define DVFSRC_RECORD_MD_7 (0x4DC)
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#define DVFSRC_RECORD_COUNT (0x4F0)
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#define DVFSRC_RSRV_0 (0x600)
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#define DVFSRC_RSRV_1 (0x604)
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#define DVFSRC_RSRV_2 (0x608)
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#define DVFSRC_RSRV_3 (0x60C)
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#define DVFSRC_RSRV_4 (0x610)
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#define DVFSRC_RSRV_5 (0x614)
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#define RECORD_SHIFT 12
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#define EMI_BW_MON_SHIFT 16
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#define EMI_BW_MON_MASK 3
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#endif /* __MTK_DVFSRC_REG_MT6768_H */
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