227 lines
4 KiB
Plaintext
227 lines
4 KiB
Plaintext
/*
|
|
* PHYTEC phyCORE-LPC3250 board
|
|
*
|
|
* Copyright 2012 Roland Stigge <stigge@antcom.de>
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "lpc32xx.dtsi"
|
|
|
|
/ {
|
|
model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
|
|
compatible = "phytec,phy3250", "nxp,lpc3250";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x4000000>;
|
|
};
|
|
|
|
regulators {
|
|
backlight_reg: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "backlight_reg";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
gpio = <&gpio 5 4 0>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
lcd_reg: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "lcd_reg";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
gpio = <&gpio 5 0 0>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
sd_reg: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "sd_reg";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio 5 5 0>;
|
|
enable-active-high;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led0 { /* red */
|
|
gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
|
|
default-state = "off";
|
|
};
|
|
|
|
led1 { /* green */
|
|
gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
};
|
|
|
|
&clcd {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
clock-frequency = <100000>;
|
|
|
|
uda1380: uda1380@18 {
|
|
compatible = "nxp,uda1380";
|
|
reg = <0x18>;
|
|
power-gpio = <&gpio 3 10 0>;
|
|
reset-gpio = <&gpio 3 2 0>;
|
|
dac-clk = "wspll";
|
|
};
|
|
|
|
pcf8563: rtc@51 {
|
|
compatible = "nxp,pcf8563";
|
|
reg = <0x51>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
&i2cusb {
|
|
clock-frequency = <100000>;
|
|
|
|
isp1301: usb-transceiver@2c {
|
|
compatible = "nxp,isp1301";
|
|
reg = <0x2c>;
|
|
};
|
|
};
|
|
|
|
&key {
|
|
keypad,num-rows = <1>;
|
|
keypad,num-columns = <1>;
|
|
nxp,debounce-delay-ms = <3>;
|
|
nxp,scan-delay-ms = <34>;
|
|
linux,keymap = <0x00000002>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mac {
|
|
phy-mode = "rmii";
|
|
use-iram;
|
|
};
|
|
|
|
/* Here, choose exactly one from: ohci, usbd */
|
|
&ohci /* &usbd */ {
|
|
transceiver = <&isp1301>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sd {
|
|
wp-gpios = <&gpio 3 0 0>;
|
|
cd-gpios = <&gpio 3 1 0>;
|
|
cd-inverted;
|
|
bus-width = <4>;
|
|
vmmc-supply = <&sd_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* 64MB Flash via SLC NAND controller */
|
|
&slc {
|
|
status = "okay";
|
|
|
|
nxp,wdr-clks = <14>;
|
|
nxp,wwidth = <40000000>;
|
|
nxp,whold = <100000000>;
|
|
nxp,wsetup = <100000000>;
|
|
nxp,rdr-clks = <14>;
|
|
nxp,rwidth = <40000000>;
|
|
nxp,rhold = <66666666>;
|
|
nxp,rsetup = <100000000>;
|
|
nand-on-flash-bbt;
|
|
gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
mtd0@0 {
|
|
label = "phy3250-boot";
|
|
reg = <0x00000000 0x00064000>;
|
|
read-only;
|
|
};
|
|
|
|
mtd1@64000 {
|
|
label = "phy3250-uboot";
|
|
reg = <0x00064000 0x00190000>;
|
|
read-only;
|
|
};
|
|
|
|
mtd2@1f4000 {
|
|
label = "phy3250-ubt-prms";
|
|
reg = <0x001f4000 0x00010000>;
|
|
};
|
|
|
|
mtd3@204000 {
|
|
label = "phy3250-kernel";
|
|
reg = <0x00204000 0x00400000>;
|
|
};
|
|
|
|
mtd4@604000 {
|
|
label = "phy3250-rootfs";
|
|
reg = <0x00604000 0x039fc000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ssp0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
num-cs = <1>;
|
|
cs-gpios = <&gpio 3 5 0>;
|
|
status = "okay";
|
|
|
|
eeprom: at25@0 {
|
|
compatible = "atmel,at25";
|
|
reg = <0>;
|
|
spi-max-frequency = <5000000>;
|
|
|
|
pl022,interface = <0>;
|
|
pl022,com-mode = <0>;
|
|
pl022,rx-level-trig = <1>;
|
|
pl022,tx-level-trig = <1>;
|
|
pl022,ctrl-len = <11>;
|
|
pl022,wait-state = <0>;
|
|
pl022,duplex = <0>;
|
|
|
|
at25,byte-len = <0x8000>;
|
|
at25,addr-mode = <2>;
|
|
at25,page-size = <64>;
|
|
};
|
|
};
|
|
|
|
&tsc {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart5 {
|
|
status = "okay";
|
|
};
|