632 lines
16 KiB
C
632 lines
16 KiB
C
/*
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* DBAu1000/1500/1100 PBAu1100/1500 board support
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*
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* Copyright 2000, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <linux/gpio/machine.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/leds.h>
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#include <linux/mmc/host.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_gpio.h>
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#include <linux/spi/ads7846.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/gpio-au1000.h>
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#include <asm/mach-au1x00/au1000_dma.h>
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#include <asm/mach-au1x00/au1100_mmc.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/reboot.h>
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#include <prom.h>
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#include "platform.h"
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#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
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const char *get_system_type(void);
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int __init db1000_board_setup(void)
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{
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/* initialize board register space */
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bcsr_init(DB1000_BCSR_PHYS_ADDR,
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DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
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switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
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case BCSR_WHOAMI_DB1000:
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case BCSR_WHOAMI_DB1500:
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case BCSR_WHOAMI_DB1100:
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case BCSR_WHOAMI_PB1500:
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case BCSR_WHOAMI_PB1500R2:
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case BCSR_WHOAMI_PB1100:
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pr_info("AMD Alchemy %s Board\n", get_system_type());
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return 0;
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}
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return -ENODEV;
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}
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static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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if ((slot < 12) || (slot > 13) || pin == 0)
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return -1;
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if (slot == 12)
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return (pin == 1) ? AU1500_PCI_INTA : 0xff;
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if (slot == 13) {
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switch (pin) {
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case 1: return AU1500_PCI_INTA;
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case 2: return AU1500_PCI_INTB;
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case 3: return AU1500_PCI_INTC;
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case 4: return AU1500_PCI_INTD;
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}
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}
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return -1;
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}
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static struct resource alchemy_pci_host_res[] = {
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[0] = {
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.start = AU1500_PCI_PHYS_ADDR,
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.end = AU1500_PCI_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct alchemy_pci_platdata db1500_pci_pd = {
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.board_map_irq = db1500_map_pci_irq,
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};
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static struct platform_device db1500_pci_host_dev = {
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.dev.platform_data = &db1500_pci_pd,
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.name = "alchemy-pci",
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.id = 0,
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.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
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.resource = alchemy_pci_host_res,
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};
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int __init db1500_pci_setup(void)
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{
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return platform_device_register(&db1500_pci_host_dev);
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}
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static struct resource au1100_lcd_resources[] = {
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[0] = {
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.start = AU1100_LCD_PHYS_ADDR,
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.end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_LCD_INT,
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.end = AU1100_LCD_INT,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1100_lcd_device = {
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.name = "au1100-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &au1100_lcd_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1100_lcd_resources),
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.resource = au1100_lcd_resources,
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};
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static struct resource alchemy_ac97c_res[] = {
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[0] = {
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.start = AU1000_AC97_PHYS_ADDR,
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.end = AU1000_AC97_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DMA_ID_AC97C_TX,
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.end = DMA_ID_AC97C_TX,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = DMA_ID_AC97C_RX,
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.end = DMA_ID_AC97C_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device alchemy_ac97c_dev = {
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.name = "alchemy-ac97c",
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.id = -1,
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.resource = alchemy_ac97c_res,
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.num_resources = ARRAY_SIZE(alchemy_ac97c_res),
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};
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static struct platform_device alchemy_ac97c_dma_dev = {
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.name = "alchemy-pcm-dma",
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.id = 0,
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};
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static struct platform_device db1x00_codec_dev = {
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.name = "ac97-codec",
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.id = -1,
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};
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static struct platform_device db1x00_audio_dev = {
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.name = "db1000-audio",
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};
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/******************************************************************************/
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static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
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{
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void (*mmc_cd)(struct mmc_host *, unsigned long);
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/* link against CONFIG_MMC=m */
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mmc_cd = symbol_get(mmc_detect_change);
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mmc_cd(ptr, msecs_to_jiffies(500));
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symbol_put(mmc_detect_change);
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return IRQ_HANDLED;
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}
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static int db1100_mmc_cd_setup(void *mmc_host, int en)
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{
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int ret = 0, irq;
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if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
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irq = AU1100_GPIO19_INT;
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else
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irq = AU1100_GPIO14_INT; /* PB1100 SD0 CD# */
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if (en) {
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irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
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ret = request_irq(irq, db1100_mmc_cd, 0,
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"sd0_cd", mmc_host);
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} else
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free_irq(irq, mmc_host);
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return ret;
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}
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static int db1100_mmc1_cd_setup(void *mmc_host, int en)
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{
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int ret = 0, irq;
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if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
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irq = AU1100_GPIO20_INT;
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else
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irq = AU1100_GPIO15_INT; /* PB1100 SD1 CD# */
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if (en) {
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irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
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ret = request_irq(irq, db1100_mmc_cd, 0,
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"sd1_cd", mmc_host);
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} else
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free_irq(irq, mmc_host);
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return ret;
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}
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static int db1100_mmc_card_readonly(void *mmc_host)
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{
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/* testing suggests that this bit is inverted */
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return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 0 : 1;
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}
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static int db1100_mmc_card_inserted(void *mmc_host)
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{
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return !alchemy_gpio_get_value(19);
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}
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static void db1100_mmc_set_power(void *mmc_host, int state)
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{
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int bit;
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if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
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bit = BCSR_BOARD_SD0PWR;
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else
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bit = BCSR_BOARD_PB1100_SD0PWR;
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if (state) {
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bcsr_mod(BCSR_BOARD, 0, bit);
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msleep(400); /* stabilization time */
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} else
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bcsr_mod(BCSR_BOARD, bit, 0);
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}
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static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b)
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{
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if (b != LED_OFF)
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bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
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else
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bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
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}
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static struct led_classdev db1100_mmc_led = {
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.brightness_set = db1100_mmcled_set,
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};
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static int db1100_mmc1_card_readonly(void *mmc_host)
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{
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return (bcsr_read(BCSR_BOARD) & BCSR_BOARD_SD1WP) ? 1 : 0;
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}
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static int db1100_mmc1_card_inserted(void *mmc_host)
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{
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return !alchemy_gpio_get_value(20);
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}
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static void db1100_mmc1_set_power(void *mmc_host, int state)
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{
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int bit;
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if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
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bit = BCSR_BOARD_SD1PWR;
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else
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bit = BCSR_BOARD_PB1100_SD1PWR;
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if (state) {
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bcsr_mod(BCSR_BOARD, 0, bit);
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msleep(400); /* stabilization time */
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} else
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bcsr_mod(BCSR_BOARD, bit, 0);
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}
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static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b)
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{
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if (b != LED_OFF)
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bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
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else
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bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
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}
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static struct led_classdev db1100_mmc1_led = {
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.brightness_set = db1100_mmc1led_set,
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};
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static struct au1xmmc_platform_data db1100_mmc_platdata[2] = {
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[0] = {
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.cd_setup = db1100_mmc_cd_setup,
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.set_power = db1100_mmc_set_power,
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.card_inserted = db1100_mmc_card_inserted,
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.card_readonly = db1100_mmc_card_readonly,
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.led = &db1100_mmc_led,
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},
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[1] = {
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.cd_setup = db1100_mmc1_cd_setup,
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.set_power = db1100_mmc1_set_power,
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.card_inserted = db1100_mmc1_card_inserted,
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.card_readonly = db1100_mmc1_card_readonly,
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.led = &db1100_mmc1_led,
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},
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};
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static struct resource au1100_mmc0_resources[] = {
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[0] = {
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.start = AU1100_SD0_PHYS_ADDR,
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.end = AU1100_SD0_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_SD_INT,
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.end = AU1100_SD_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = DMA_ID_SD0_TX,
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.end = DMA_ID_SD0_TX,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DMA_ID_SD0_RX,
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.end = DMA_ID_SD0_RX,
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.flags = IORESOURCE_DMA,
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}
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};
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static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
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static struct platform_device db1100_mmc0_dev = {
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.name = "au1xxx-mmc",
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.id = 0,
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.dev = {
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.dma_mask = &au1xxx_mmc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &db1100_mmc_platdata[0],
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},
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.num_resources = ARRAY_SIZE(au1100_mmc0_resources),
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.resource = au1100_mmc0_resources,
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};
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static struct resource au1100_mmc1_res[] = {
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[0] = {
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.start = AU1100_SD1_PHYS_ADDR,
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.end = AU1100_SD1_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1100_SD_INT,
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.end = AU1100_SD_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = DMA_ID_SD1_TX,
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.end = DMA_ID_SD1_TX,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = DMA_ID_SD1_RX,
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.end = DMA_ID_SD1_RX,
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.flags = IORESOURCE_DMA,
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}
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};
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static struct platform_device db1100_mmc1_dev = {
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.name = "au1xxx-mmc",
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.id = 1,
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.dev = {
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.dma_mask = &au1xxx_mmc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &db1100_mmc_platdata[1],
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},
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.num_resources = ARRAY_SIZE(au1100_mmc1_res),
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.resource = au1100_mmc1_res,
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};
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/******************************************************************************/
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static void db1000_irda_set_phy_mode(int mode)
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{
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unsigned short mask = BCSR_RESETS_IRDA_MODE_MASK | BCSR_RESETS_FIR_SEL;
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switch (mode) {
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case AU1000_IRDA_PHY_MODE_OFF:
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bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_OFF);
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break;
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case AU1000_IRDA_PHY_MODE_SIR:
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bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL);
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break;
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case AU1000_IRDA_PHY_MODE_FIR:
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bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL |
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BCSR_RESETS_FIR_SEL);
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break;
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}
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}
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static struct au1k_irda_platform_data db1000_irda_platdata = {
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.set_phy_mode = db1000_irda_set_phy_mode,
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};
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static struct resource au1000_irda_res[] = {
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[0] = {
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.start = AU1000_IRDA_PHYS_ADDR,
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.end = AU1000_IRDA_PHYS_ADDR + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1000_IRDA_TX_INT,
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.end = AU1000_IRDA_TX_INT,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = AU1000_IRDA_RX_INT,
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.end = AU1000_IRDA_RX_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device db1000_irda_dev = {
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.name = "au1000-irda",
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.id = -1,
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.dev = {
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.platform_data = &db1000_irda_platdata,
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},
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.resource = au1000_irda_res,
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.num_resources = ARRAY_SIZE(au1000_irda_res),
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};
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/******************************************************************************/
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static struct ads7846_platform_data db1100_touch_pd = {
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.model = 7846,
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.vref_mv = 3300,
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.gpio_pendown = 21,
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};
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static struct spi_gpio_platform_data db1100_spictl_pd = {
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.num_chipselect = 1,
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};
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static struct spi_board_info db1100_spi_info[] __initdata = {
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[0] = {
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.modalias = "ads7846",
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.max_speed_hz = 3250000,
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.bus_num = 0,
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.chip_select = 0,
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.mode = 0,
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.irq = AU1100_GPIO21_INT,
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.platform_data = &db1100_touch_pd,
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},
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};
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static struct platform_device db1100_spi_dev = {
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.name = "spi_gpio",
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.id = 0,
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.dev = {
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.platform_data = &db1100_spictl_pd,
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},
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};
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/*
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* Alchemy GPIO 2 has its base at 200 so the GPIO lines
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* 207 thru 210 are GPIOs at offset 7 thru 10 at this chip.
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*/
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static struct gpiod_lookup_table db1100_spi_gpiod_table = {
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.dev_id = "spi_gpio",
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.table = {
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GPIO_LOOKUP("alchemy-gpio2", 9,
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"sck", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("alchemy-gpio2", 8,
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"mosi", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("alchemy-gpio2", 7,
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"miso", GPIO_ACTIVE_HIGH),
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GPIO_LOOKUP("alchemy-gpio2", 10,
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"cs", GPIO_ACTIVE_HIGH),
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{ },
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},
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};
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static struct platform_device *db1x00_devs[] = {
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&db1x00_codec_dev,
|
|
&alchemy_ac97c_dma_dev,
|
|
&alchemy_ac97c_dev,
|
|
&db1x00_audio_dev,
|
|
};
|
|
|
|
static struct platform_device *db1000_devs[] = {
|
|
&db1000_irda_dev,
|
|
};
|
|
|
|
static struct platform_device *db1100_devs[] = {
|
|
&au1100_lcd_device,
|
|
&db1100_mmc0_dev,
|
|
&db1100_mmc1_dev,
|
|
&db1000_irda_dev,
|
|
};
|
|
|
|
int __init db1000_dev_setup(void)
|
|
{
|
|
int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
|
|
int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1;
|
|
unsigned long pfc;
|
|
struct clk *c, *p;
|
|
|
|
if (board == BCSR_WHOAMI_DB1500) {
|
|
c0 = AU1500_GPIO2_INT;
|
|
c1 = AU1500_GPIO5_INT;
|
|
d0 = 0; /* GPIO number, NOT irq! */
|
|
d1 = 3; /* GPIO number, NOT irq! */
|
|
s0 = AU1500_GPIO1_INT;
|
|
s1 = AU1500_GPIO4_INT;
|
|
} else if (board == BCSR_WHOAMI_DB1100) {
|
|
c0 = AU1100_GPIO2_INT;
|
|
c1 = AU1100_GPIO5_INT;
|
|
d0 = 0; /* GPIO number, NOT irq! */
|
|
d1 = 3; /* GPIO number, NOT irq! */
|
|
s0 = AU1100_GPIO1_INT;
|
|
s1 = AU1100_GPIO4_INT;
|
|
|
|
gpio_request(19, "sd0_cd");
|
|
gpio_request(20, "sd1_cd");
|
|
gpio_direction_input(19); /* sd0 cd# */
|
|
gpio_direction_input(20); /* sd1 cd# */
|
|
|
|
/* spi_gpio on SSI0 pins */
|
|
pfc = alchemy_rdsys(AU1000_SYS_PINFUNC);
|
|
pfc |= (1 << 0); /* SSI0 pins as GPIOs */
|
|
alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
|
|
|
|
spi_register_board_info(db1100_spi_info,
|
|
ARRAY_SIZE(db1100_spi_info));
|
|
|
|
/* link LCD clock to AUXPLL */
|
|
p = clk_get(NULL, "auxpll_clk");
|
|
c = clk_get(NULL, "lcd_intclk");
|
|
if (!IS_ERR(c) && !IS_ERR(p)) {
|
|
clk_set_parent(c, p);
|
|
clk_set_rate(c, clk_get_rate(p));
|
|
}
|
|
if (!IS_ERR(c))
|
|
clk_put(c);
|
|
if (!IS_ERR(p))
|
|
clk_put(p);
|
|
|
|
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
|
|
gpiod_add_lookup_table(&db1100_spi_gpiod_table);
|
|
platform_device_register(&db1100_spi_dev);
|
|
} else if (board == BCSR_WHOAMI_DB1000) {
|
|
c0 = AU1000_GPIO2_INT;
|
|
c1 = AU1000_GPIO5_INT;
|
|
d0 = 0; /* GPIO number, NOT irq! */
|
|
d1 = 3; /* GPIO number, NOT irq! */
|
|
s0 = AU1000_GPIO1_INT;
|
|
s1 = AU1000_GPIO4_INT;
|
|
platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs));
|
|
} else if ((board == BCSR_WHOAMI_PB1500) ||
|
|
(board == BCSR_WHOAMI_PB1500R2)) {
|
|
c0 = AU1500_GPIO203_INT;
|
|
d0 = 1; /* GPIO number, NOT irq! */
|
|
s0 = AU1500_GPIO202_INT;
|
|
twosocks = 0;
|
|
flashsize = 64;
|
|
/* RTC and daughtercard irqs */
|
|
irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
|
|
/* EPSON S1D13806 0x1b000000
|
|
* SRAM 1MB/2MB 0x1a000000
|
|
* DS1693 RTC 0x0c000000
|
|
*/
|
|
} else if (board == BCSR_WHOAMI_PB1100) {
|
|
c0 = AU1100_GPIO11_INT;
|
|
d0 = 9; /* GPIO number, NOT irq! */
|
|
s0 = AU1100_GPIO10_INT;
|
|
twosocks = 0;
|
|
flashsize = 64;
|
|
/* pendown, rtc, daughtercard irqs */
|
|
irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW);
|
|
/* EPSON S1D13806 0x1b000000
|
|
* SRAM 1MB/2MB 0x1a000000
|
|
* DiskOnChip 0x0d000000
|
|
* DS1693 RTC 0x0c000000
|
|
*/
|
|
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
|
|
} else
|
|
return 0; /* unknown board, no further dev setup to do */
|
|
|
|
irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
|
|
|
|
db1x_register_pcmcia_socket(
|
|
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
|
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
|
AU1000_PCMCIA_MEM_PHYS_ADDR,
|
|
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
|
|
AU1000_PCMCIA_IO_PHYS_ADDR,
|
|
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
|
|
c0, d0, /*s0*/0, 0, 0);
|
|
|
|
if (twosocks) {
|
|
irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
|
|
irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
|
|
|
|
db1x_register_pcmcia_socket(
|
|
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
|
|
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
|
|
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
|
|
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
|
|
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
|
|
AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
|
|
c1, d1, /*s1*/0, 0, 1);
|
|
}
|
|
|
|
platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
|
|
db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED);
|
|
return 0;
|
|
}
|