251 lines
6.2 KiB
C
251 lines
6.2 KiB
C
/*
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* Copyright 2011, Netlogic Microsystems.
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* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/resource.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/i2c.h>
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#include <linux/usb/ehci_pdriver.h>
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#include <linux/usb/ohci_pdriver.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/xlr/iomap.h>
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#include <asm/netlogic/xlr/pic.h>
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#include <asm/netlogic/xlr/xlr.h>
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static unsigned int nlm_xlr_uart_in(struct uart_port *p, int offset)
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{
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uint64_t uartbase;
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unsigned int value;
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/* sign extend to 64 bits, if needed */
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uartbase = (uint64_t)(long)p->membase;
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value = nlm_read_reg(uartbase, offset);
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/* See XLR/XLS errata */
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if (offset == UART_MSR)
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value ^= 0xF0;
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else if (offset == UART_MCR)
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value ^= 0x3;
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return value;
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}
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static void nlm_xlr_uart_out(struct uart_port *p, int offset, int value)
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{
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uint64_t uartbase;
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/* sign extend to 64 bits, if needed */
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uartbase = (uint64_t)(long)p->membase;
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/* See XLR/XLS errata */
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if (offset == UART_MSR)
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value ^= 0xF0;
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else if (offset == UART_MCR)
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value ^= 0x3;
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nlm_write_reg(uartbase, offset, value);
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}
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#define PORT(_irq) \
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{ \
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.irq = _irq, \
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.regshift = 2, \
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.iotype = UPIO_MEM32, \
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.flags = (UPF_SKIP_TEST | \
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UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
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.uartclk = PIC_CLK_HZ, \
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.type = PORT_16550A, \
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.serial_in = nlm_xlr_uart_in, \
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.serial_out = nlm_xlr_uart_out, \
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}
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static struct plat_serial8250_port xlr_uart_data[] = {
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PORT(PIC_UART_0_IRQ),
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PORT(PIC_UART_1_IRQ),
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{},
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};
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static struct platform_device uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = xlr_uart_data,
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},
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};
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static int __init nlm_uart_init(void)
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{
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unsigned long uartbase;
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uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
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xlr_uart_data[0].membase = (void __iomem *)uartbase;
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xlr_uart_data[0].mapbase = CPHYSADDR(uartbase);
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uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_1_OFFSET);
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xlr_uart_data[1].membase = (void __iomem *)uartbase;
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xlr_uart_data[1].mapbase = CPHYSADDR(uartbase);
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return platform_device_register(&uart_device);
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}
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arch_initcall(nlm_uart_init);
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#ifdef CONFIG_USB
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/* Platform USB devices, only on XLS chips */
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static u64 xls_usb_dmamask = ~(u32)0;
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#define USB_PLATFORM_DEV(n, i, irq) \
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{ \
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.name = n, \
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.id = i, \
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.num_resources = 2, \
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.dev = { \
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.dma_mask = &xls_usb_dmamask, \
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.coherent_dma_mask = 0xffffffff, \
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}, \
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.resource = (struct resource[]) { \
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{ \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = irq, \
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.end = irq, \
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.flags = IORESOURCE_IRQ, \
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}, \
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}, \
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}
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static struct usb_ehci_pdata xls_usb_ehci_pdata = {
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.caps_offset = 0,
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};
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static struct usb_ohci_pdata xls_usb_ohci_pdata;
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static struct platform_device xls_usb_ehci_device =
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USB_PLATFORM_DEV("ehci-platform", 0, PIC_USB_IRQ);
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static struct platform_device xls_usb_ohci_device_0 =
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USB_PLATFORM_DEV("ohci-platform", 1, PIC_USB_IRQ);
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static struct platform_device xls_usb_ohci_device_1 =
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USB_PLATFORM_DEV("ohci-platform", 2, PIC_USB_IRQ);
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static struct platform_device *xls_platform_devices[] = {
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&xls_usb_ehci_device,
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&xls_usb_ohci_device_0,
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&xls_usb_ohci_device_1,
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};
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int xls_platform_usb_init(void)
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{
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uint64_t usb_mmio, gpio_mmio;
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unsigned long memres;
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uint32_t val;
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if (!nlm_chip_is_xls())
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return 0;
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gpio_mmio = nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET);
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usb_mmio = nlm_mmio_base(NETLOGIC_IO_USB_1_OFFSET);
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/* Clear Rogue Phy INTs */
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nlm_write_reg(usb_mmio, 49, 0x10000000);
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/* Enable all interrupts */
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nlm_write_reg(usb_mmio, 50, 0x1f000000);
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/* Enable ports */
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nlm_write_reg(usb_mmio, 1, 0x07000500);
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val = nlm_read_reg(gpio_mmio, 21);
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if (((val >> 22) & 0x01) == 0) {
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pr_info("Detected USB Device mode - Not supported!\n");
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nlm_write_reg(usb_mmio, 0, 0x01000000);
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return 0;
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}
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pr_info("Detected USB Host mode - Adding XLS USB devices.\n");
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/* Clear reset, host mode */
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nlm_write_reg(usb_mmio, 0, 0x02000000);
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/* Memory resource for various XLS usb ports */
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usb_mmio = nlm_mmio_base(NETLOGIC_IO_USB_0_OFFSET);
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memres = CPHYSADDR((unsigned long)usb_mmio);
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xls_usb_ehci_device.resource[0].start = memres;
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xls_usb_ehci_device.resource[0].end = memres + 0x400 - 1;
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xls_usb_ehci_device.dev.platform_data = &xls_usb_ehci_pdata;
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memres += 0x400;
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xls_usb_ohci_device_0.resource[0].start = memres;
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xls_usb_ohci_device_0.resource[0].end = memres + 0x400 - 1;
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xls_usb_ohci_device_0.dev.platform_data = &xls_usb_ohci_pdata;
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memres += 0x400;
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xls_usb_ohci_device_1.resource[0].start = memres;
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xls_usb_ohci_device_1.resource[0].end = memres + 0x400 - 1;
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xls_usb_ohci_device_1.dev.platform_data = &xls_usb_ohci_pdata;
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return platform_add_devices(xls_platform_devices,
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ARRAY_SIZE(xls_platform_devices));
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}
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arch_initcall(xls_platform_usb_init);
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#endif
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#ifdef CONFIG_I2C
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static struct i2c_board_info nlm_i2c_board_info1[] __initdata = {
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/* All XLR boards have this RTC and Max6657 Temp Chip */
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[0] = {
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.type = "ds1374",
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.addr = 0x68
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},
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[1] = {
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.type = "lm90",
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.addr = 0x4c
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},
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};
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static struct resource i2c_resources[] = {
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[0] = {
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.start = 0, /* filled at init */
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.end = 0,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device nlm_xlr_i2c_1 = {
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.name = "xlr-i2cbus",
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.id = 1,
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.num_resources = 1,
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.resource = i2c_resources,
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};
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static int __init nlm_i2c_init(void)
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{
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int err = 0;
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unsigned int offset;
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/* I2C bus 0 does not have any useful devices, configure only bus 1 */
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offset = NETLOGIC_IO_I2C_1_OFFSET;
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nlm_xlr_i2c_1.resource[0].start = CPHYSADDR(nlm_mmio_base(offset));
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nlm_xlr_i2c_1.resource[0].end = nlm_xlr_i2c_1.resource[0].start + 0xfff;
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platform_device_register(&nlm_xlr_i2c_1);
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err = i2c_register_board_info(1, nlm_i2c_board_info1,
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ARRAY_SIZE(nlm_i2c_board_info1));
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if (err < 0)
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pr_err("nlm-i2c: cannot register board I2C devices\n");
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return err;
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}
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arch_initcall(nlm_i2c_init);
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#endif
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