6db4831e98
Android 14
191 lines
4.1 KiB
C
191 lines
4.1 KiB
C
/*
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* This file manages the translation entries for the IBM Calgary IOMMU.
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*
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* Derived from arch/powerpc/platforms/pseries/iommu.c
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*
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* Copyright (C) IBM Corporation, 2006
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*
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* Author: Jon Mason <jdmason@us.ibm.com>
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* Author: Muli Ben-Yehuda <muli@il.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/bootmem.h>
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#include <asm/tce.h>
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#include <asm/calgary.h>
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#include <asm/proto.h>
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#include <asm/cacheflush.h>
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/* flush a tce at 'tceaddr' to main memory */
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static inline void flush_tce(void* tceaddr)
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{
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/* a single tce can't cross a cache line */
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if (boot_cpu_has(X86_FEATURE_CLFLUSH))
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clflush(tceaddr);
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else
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wbinvd();
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}
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void tce_build(struct iommu_table *tbl, unsigned long index,
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unsigned int npages, unsigned long uaddr, int direction)
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{
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u64* tp;
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u64 t;
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u64 rpn;
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t = (1 << TCE_READ_SHIFT);
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if (direction != DMA_TO_DEVICE)
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t |= (1 << TCE_WRITE_SHIFT);
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tp = ((u64*)tbl->it_base) + index;
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while (npages--) {
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rpn = (virt_to_bus((void*)uaddr)) >> PAGE_SHIFT;
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t &= ~TCE_RPN_MASK;
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t |= (rpn << TCE_RPN_SHIFT);
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*tp = cpu_to_be64(t);
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flush_tce(tp);
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uaddr += PAGE_SIZE;
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tp++;
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}
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}
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void tce_free(struct iommu_table *tbl, long index, unsigned int npages)
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{
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u64* tp;
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tp = ((u64*)tbl->it_base) + index;
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while (npages--) {
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*tp = cpu_to_be64(0);
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flush_tce(tp);
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tp++;
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}
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}
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static inline unsigned int table_size_to_number_of_entries(unsigned char size)
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{
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/*
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* size is the order of the table, 0-7
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* smallest table is 8K entries, so shift result by 13 to
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* multiply by 8K
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*/
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return (1 << size) << 13;
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}
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static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl)
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{
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unsigned int bitmapsz;
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unsigned long bmppages;
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int ret;
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tbl->it_busno = dev->bus->number;
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/* set the tce table size - measured in entries */
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tbl->it_size = table_size_to_number_of_entries(specified_table_size);
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/*
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* number of bytes needed for the bitmap size in number of
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* entries; we need one bit per entry
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*/
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bitmapsz = tbl->it_size / BITS_PER_BYTE;
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bmppages = __get_free_pages(GFP_KERNEL, get_order(bitmapsz));
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if (!bmppages) {
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printk(KERN_ERR "Calgary: cannot allocate bitmap\n");
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ret = -ENOMEM;
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goto done;
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}
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tbl->it_map = (unsigned long*)bmppages;
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memset(tbl->it_map, 0, bitmapsz);
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tbl->it_hint = 0;
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spin_lock_init(&tbl->it_lock);
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return 0;
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done:
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return ret;
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}
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int __init build_tce_table(struct pci_dev *dev, void __iomem *bbar)
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{
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struct iommu_table *tbl;
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int ret;
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if (pci_iommu(dev->bus)) {
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printk(KERN_ERR "Calgary: dev %p has sysdata->iommu %p\n",
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dev, pci_iommu(dev->bus));
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BUG();
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}
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tbl = kzalloc(sizeof(struct iommu_table), GFP_KERNEL);
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if (!tbl) {
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printk(KERN_ERR "Calgary: error allocating iommu_table\n");
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ret = -ENOMEM;
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goto done;
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}
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ret = tce_table_setparms(dev, tbl);
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if (ret)
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goto free_tbl;
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tbl->bbar = bbar;
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set_pci_iommu(dev->bus, tbl);
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return 0;
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free_tbl:
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kfree(tbl);
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done:
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return ret;
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}
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void * __init alloc_tce_table(void)
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{
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unsigned int size;
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size = table_size_to_number_of_entries(specified_table_size);
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size *= TCE_ENTRY_SIZE;
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return __alloc_bootmem_low(size, size, 0);
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}
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void __init free_tce_table(void *tbl)
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{
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unsigned int size;
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if (!tbl)
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return;
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size = table_size_to_number_of_entries(specified_table_size);
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size *= TCE_ENTRY_SIZE;
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free_bootmem(__pa(tbl), size);
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}
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