54 lines
898 B
C
54 lines
898 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2021 MediaTek Inc.
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*/
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#ifndef __DRV_CLKCHK_MT6893_H
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#define __DRV_CLKCHK_MT6893_H
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enum chk_sys_id {
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topckgen,
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infracfg,
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scpsys,
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apmixed,
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audio,
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mfgsys,
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mmsys,
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mdpsys,
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img1sys,
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img2sys,
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ipesys,
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camsys,
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cam_rawa_sys,
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cam_rawb_sys,
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cam_rawc_sys,
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vencsys,
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venc_c1_sys,
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vdecsys,
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vdec_soc_sys,
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ipu_vcore,
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ipu_conn,
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ipu0,
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ipu1,
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ipu2,
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infracfg_dbg,
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scp_par,
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chk_sys_num,
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};
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extern const char * const *get_mt6893_all_clk_names(void);
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extern struct regbase *get_mt6893_all_reg_bases(void);
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extern struct regname *get_mt6893_all_reg_names(void);
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/*ram console api*/
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#ifdef CONFIG_MTK_RAM_CONSOLE
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extern void aee_rr_rec_clk(int id, u32 val);
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#endif
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extern void print_enabled_clks_once(void);
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extern void print_subsys_reg(enum chk_sys_id id);
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extern int get_sw_req_vcore_opp(void);
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#endif /* __DRV_CLKCHK_MT6893_H */
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