6db4831e98
Android 14
267 lines
7.9 KiB
C
267 lines
7.9 KiB
C
/*
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* Driver for the Conexant CX23885 PCIe bridge
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*
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* Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*/
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#include "cx23885.h"
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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static unsigned int vbibufs = 4;
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module_param(vbibufs, int, 0644);
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MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32");
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static unsigned int vbi_debug;
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module_param(vbi_debug, int, 0644);
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MODULE_PARM_DESC(vbi_debug, "enable debug messages [vbi]");
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#define dprintk(level, fmt, arg...)\
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do { if (vbi_debug >= level)\
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printk(KERN_DEBUG pr_fmt("%s: vbi:" fmt), \
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__func__, ##arg); \
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} while (0)
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/* ------------------------------------------------------------------ */
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#define VBI_LINE_LENGTH 1440
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#define VBI_NTSC_LINE_COUNT 12
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#define VBI_PAL_LINE_COUNT 18
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int cx23885_vbi_fmt(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct cx23885_dev *dev = video_drvdata(file);
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f->fmt.vbi.sampling_rate = 27000000;
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f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
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f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
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f->fmt.vbi.offset = 0;
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f->fmt.vbi.flags = 0;
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if (dev->tvnorm & V4L2_STD_525_60) {
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/* ntsc */
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f->fmt.vbi.start[0] = V4L2_VBI_ITU_525_F1_START + 9;
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f->fmt.vbi.start[1] = V4L2_VBI_ITU_525_F2_START + 9;
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f->fmt.vbi.count[0] = VBI_NTSC_LINE_COUNT;
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f->fmt.vbi.count[1] = VBI_NTSC_LINE_COUNT;
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} else if (dev->tvnorm & V4L2_STD_625_50) {
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/* pal */
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f->fmt.vbi.start[0] = V4L2_VBI_ITU_625_F1_START + 5;
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f->fmt.vbi.start[1] = V4L2_VBI_ITU_625_F2_START + 5;
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f->fmt.vbi.count[0] = VBI_PAL_LINE_COUNT;
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f->fmt.vbi.count[1] = VBI_PAL_LINE_COUNT;
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}
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return 0;
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}
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/* We're given the Video Interrupt status register.
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* The cx23885_video_irq() func has already validated
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* the potential error bits, we just need to
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* deal with vbi payload and return indication if
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* we actually processed any payload.
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*/
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int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status)
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{
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u32 count;
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int handled = 0;
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if (status & VID_BC_MSK_VBI_RISCI1) {
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dprintk(1, "%s() VID_BC_MSK_VBI_RISCI1\n", __func__);
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spin_lock(&dev->slock);
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count = cx_read(VBI_A_GPCNT);
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cx23885_video_wakeup(dev, &dev->vbiq, count);
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spin_unlock(&dev->slock);
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handled++;
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}
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return handled;
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}
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static int cx23885_start_vbi_dma(struct cx23885_dev *dev,
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struct cx23885_dmaqueue *q,
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struct cx23885_buffer *buf)
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{
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dprintk(1, "%s()\n", __func__);
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/* setup fifo + format */
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cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH02],
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VBI_LINE_LENGTH, buf->risc.dma);
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/* reset counter */
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cx_write(VID_A_VBI_CTRL, 3);
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cx_write(VBI_A_GPCNT_CTL, 3);
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q->count = 0;
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/* enable irq */
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cx23885_irq_add_enable(dev, 0x01);
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cx_set(VID_A_INT_MSK, 0x000022);
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/* start dma */
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cx_set(DEV_CNTRL2, (1<<5));
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cx_set(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
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return 0;
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}
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/* ------------------------------------------------------------------ */
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static int queue_setup(struct vb2_queue *q,
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unsigned int *num_buffers, unsigned int *num_planes,
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unsigned int sizes[], struct device *alloc_devs[])
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{
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struct cx23885_dev *dev = q->drv_priv;
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unsigned lines = VBI_PAL_LINE_COUNT;
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if (dev->tvnorm & V4L2_STD_525_60)
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lines = VBI_NTSC_LINE_COUNT;
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*num_planes = 1;
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sizes[0] = lines * VBI_LINE_LENGTH * 2;
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return 0;
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}
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static int buffer_prepare(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
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struct cx23885_buffer *buf = container_of(vbuf,
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struct cx23885_buffer, vb);
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struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
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unsigned lines = VBI_PAL_LINE_COUNT;
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if (dev->tvnorm & V4L2_STD_525_60)
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lines = VBI_NTSC_LINE_COUNT;
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if (vb2_plane_size(vb, 0) < lines * VBI_LINE_LENGTH * 2)
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return -EINVAL;
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vb2_set_plane_payload(vb, 0, lines * VBI_LINE_LENGTH * 2);
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cx23885_risc_vbibuffer(dev->pci, &buf->risc,
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sgt->sgl,
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0, VBI_LINE_LENGTH * lines,
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VBI_LINE_LENGTH, 0,
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lines);
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return 0;
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}
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static void buffer_finish(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx23885_buffer *buf = container_of(vbuf,
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struct cx23885_buffer, vb);
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cx23885_free_buffer(vb->vb2_queue->drv_priv, buf);
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}
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/*
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* The risc program for each buffer works as follows: it starts with a simple
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* 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
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* buffer follows and at the end we have a JUMP back to the start + 12 (skipping
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* the initial JUMP).
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*
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* This is the risc program of the first buffer to be queued if the active list
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* is empty and it just keeps DMAing this buffer without generating any
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* interrupts.
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*
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* If a new buffer is added then the initial JUMP in the code for that buffer
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* will generate an interrupt which signals that the previous buffer has been
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* DMAed successfully and that it can be returned to userspace.
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*
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* It also sets the final jump of the previous buffer to the start of the new
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* buffer, thus chaining the new buffer into the DMA chain. This is a single
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* atomic u32 write, so there is no race condition.
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*
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* The end-result of all this that you only get an interrupt when a buffer
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* is ready, so the control flow is very easy.
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*/
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static void buffer_queue(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
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struct cx23885_buffer *buf = container_of(vbuf,
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struct cx23885_buffer, vb);
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struct cx23885_buffer *prev;
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struct cx23885_dmaqueue *q = &dev->vbiq;
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unsigned long flags;
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buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
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buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
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buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
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buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
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if (list_empty(&q->active)) {
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spin_lock_irqsave(&dev->slock, flags);
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list_add_tail(&buf->queue, &q->active);
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spin_unlock_irqrestore(&dev->slock, flags);
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dprintk(2, "[%p/%d] vbi_queue - first active\n",
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buf, buf->vb.vb2_buf.index);
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} else {
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buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
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prev = list_entry(q->active.prev, struct cx23885_buffer,
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queue);
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spin_lock_irqsave(&dev->slock, flags);
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list_add_tail(&buf->queue, &q->active);
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spin_unlock_irqrestore(&dev->slock, flags);
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prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
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dprintk(2, "[%p/%d] buffer_queue - append to active\n",
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buf, buf->vb.vb2_buf.index);
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}
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}
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static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
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{
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struct cx23885_dev *dev = q->drv_priv;
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struct cx23885_dmaqueue *dmaq = &dev->vbiq;
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struct cx23885_buffer *buf = list_entry(dmaq->active.next,
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struct cx23885_buffer, queue);
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cx23885_start_vbi_dma(dev, dmaq, buf);
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return 0;
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}
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static void cx23885_stop_streaming(struct vb2_queue *q)
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{
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struct cx23885_dev *dev = q->drv_priv;
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struct cx23885_dmaqueue *dmaq = &dev->vbiq;
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unsigned long flags;
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cx_clear(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
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spin_lock_irqsave(&dev->slock, flags);
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while (!list_empty(&dmaq->active)) {
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struct cx23885_buffer *buf = list_entry(dmaq->active.next,
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struct cx23885_buffer, queue);
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list_del(&buf->queue);
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vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
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}
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spin_unlock_irqrestore(&dev->slock, flags);
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}
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const struct vb2_ops cx23885_vbi_qops = {
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.queue_setup = queue_setup,
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.buf_prepare = buffer_prepare,
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.buf_finish = buffer_finish,
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.buf_queue = buffer_queue,
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.wait_prepare = vb2_ops_wait_prepare,
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.wait_finish = vb2_ops_wait_finish,
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.start_streaming = cx23885_start_streaming,
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.stop_streaming = cx23885_stop_streaming,
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};
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