6db4831e98
Android 14
59 lines
1.5 KiB
C
59 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _DMA_REMAPPING_H
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#define _DMA_REMAPPING_H
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/*
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* VT-d hardware uses 4KiB page size regardless of host page size.
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*/
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#define VTD_PAGE_SHIFT (12)
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#define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
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#define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
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#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
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#define VTD_STRIDE_SHIFT (9)
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#define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT)
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#define DMA_PTE_READ (1)
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#define DMA_PTE_WRITE (2)
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#define DMA_PTE_LARGE_PAGE (1 << 7)
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#define DMA_PTE_SNP (1 << 11)
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#define CONTEXT_TT_MULTI_LEVEL 0
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#define CONTEXT_TT_DEV_IOTLB 1
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#define CONTEXT_TT_PASS_THROUGH 2
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/* Extended context entry types */
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#define CONTEXT_TT_PT_PASID 4
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#define CONTEXT_TT_PT_PASID_DEV_IOTLB 5
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#define CONTEXT_TT_MASK (7ULL << 2)
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#define CONTEXT_DINVE (1ULL << 8)
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#define CONTEXT_PRS (1ULL << 9)
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#define CONTEXT_PASIDE (1ULL << 11)
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struct intel_iommu;
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struct dmar_domain;
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struct root_entry;
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#ifdef CONFIG_INTEL_IOMMU
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extern int iommu_calculate_agaw(struct intel_iommu *iommu);
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extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
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extern int dmar_disabled;
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extern int intel_iommu_enabled;
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extern int intel_iommu_tboot_noforce;
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#else
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static inline int iommu_calculate_agaw(struct intel_iommu *iommu)
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{
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return 0;
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}
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static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu)
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{
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return 0;
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}
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#define dmar_disabled (1)
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#define intel_iommu_enabled (0)
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#endif
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#endif
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