145 lines
4.1 KiB
C
145 lines
4.1 KiB
C
/*
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* Copyright (c) 2018 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef __MLX5_ACCEL_H__
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#define __MLX5_ACCEL_H__
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#include <linux/mlx5/driver.h>
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enum mlx5_accel_esp_aes_gcm_keymat_iv_algo {
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MLX5_ACCEL_ESP_AES_GCM_IV_ALGO_SEQ,
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};
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enum mlx5_accel_esp_flags {
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MLX5_ACCEL_ESP_FLAGS_TUNNEL = 0, /* Default */
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MLX5_ACCEL_ESP_FLAGS_TRANSPORT = 1UL << 0,
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MLX5_ACCEL_ESP_FLAGS_ESN_TRIGGERED = 1UL << 1,
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MLX5_ACCEL_ESP_FLAGS_ESN_STATE_OVERLAP = 1UL << 2,
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};
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enum mlx5_accel_esp_action {
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MLX5_ACCEL_ESP_ACTION_DECRYPT,
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MLX5_ACCEL_ESP_ACTION_ENCRYPT,
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};
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enum mlx5_accel_esp_keymats {
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MLX5_ACCEL_ESP_KEYMAT_AES_NONE,
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MLX5_ACCEL_ESP_KEYMAT_AES_GCM,
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};
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enum mlx5_accel_esp_replay {
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MLX5_ACCEL_ESP_REPLAY_NONE,
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MLX5_ACCEL_ESP_REPLAY_BMP,
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};
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struct aes_gcm_keymat {
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u64 seq_iv;
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enum mlx5_accel_esp_aes_gcm_keymat_iv_algo iv_algo;
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u32 salt;
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u32 icv_len;
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u32 key_len;
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u32 aes_key[256 / 32];
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};
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struct mlx5_accel_esp_xfrm_attrs {
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enum mlx5_accel_esp_action action;
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u32 esn;
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u32 spi;
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u32 seq;
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u32 tfc_pad;
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u32 flags;
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u32 sa_handle;
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enum mlx5_accel_esp_replay replay_type;
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union {
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struct {
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u32 size;
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} bmp;
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} replay;
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enum mlx5_accel_esp_keymats keymat_type;
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union {
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struct aes_gcm_keymat aes_gcm;
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} keymat;
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};
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struct mlx5_accel_esp_xfrm {
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struct mlx5_core_dev *mdev;
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struct mlx5_accel_esp_xfrm_attrs attrs;
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};
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enum {
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MLX5_ACCEL_XFRM_FLAG_REQUIRE_METADATA = 1UL << 0,
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};
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enum mlx5_accel_ipsec_cap {
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MLX5_ACCEL_IPSEC_CAP_DEVICE = 1 << 0,
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MLX5_ACCEL_IPSEC_CAP_REQUIRED_METADATA = 1 << 1,
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MLX5_ACCEL_IPSEC_CAP_ESP = 1 << 2,
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MLX5_ACCEL_IPSEC_CAP_IPV6 = 1 << 3,
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MLX5_ACCEL_IPSEC_CAP_LSO = 1 << 4,
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MLX5_ACCEL_IPSEC_CAP_RX_NO_TRAILER = 1 << 5,
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MLX5_ACCEL_IPSEC_CAP_ESN = 1 << 6,
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MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN = 1 << 7,
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};
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#ifdef CONFIG_MLX5_ACCEL
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u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev);
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struct mlx5_accel_esp_xfrm *
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mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
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const struct mlx5_accel_esp_xfrm_attrs *attrs,
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u32 flags);
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void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm);
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int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
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const struct mlx5_accel_esp_xfrm_attrs *attrs);
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#else
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static inline u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev) { return 0; }
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static inline struct mlx5_accel_esp_xfrm *
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mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
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const struct mlx5_accel_esp_xfrm_attrs *attrs,
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u32 flags) { return ERR_PTR(-EOPNOTSUPP); }
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static inline void
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mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm) {}
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static inline int
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mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
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const struct mlx5_accel_esp_xfrm_attrs *attrs) { return -EOPNOTSUPP; }
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#endif
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#endif
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