6db4831e98
Android 14
428 lines
10 KiB
C
428 lines
10 KiB
C
/*
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* fsgsbase.c, an fsgsbase test
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* Copyright (c) 2014-2016 Andy Lutomirski
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* GPL v2
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*/
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#define _GNU_SOURCE
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include <string.h>
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#include <sys/syscall.h>
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#include <unistd.h>
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#include <err.h>
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#include <sys/user.h>
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#include <asm/prctl.h>
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#include <sys/prctl.h>
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#include <signal.h>
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#include <limits.h>
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#include <sys/ucontext.h>
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#include <sched.h>
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#include <linux/futex.h>
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#include <pthread.h>
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#include <asm/ldt.h>
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#include <sys/mman.h>
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#ifndef __x86_64__
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# error This test is 64-bit only
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#endif
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static volatile sig_atomic_t want_segv;
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static volatile unsigned long segv_addr;
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static int nerrs;
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static void sethandler(int sig, void (*handler)(int, siginfo_t *, void *),
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int flags)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = handler;
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sa.sa_flags = SA_SIGINFO | flags;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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err(1, "sigaction");
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}
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static void clearhandler(int sig)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_handler = SIG_DFL;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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err(1, "sigaction");
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}
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static void sigsegv(int sig, siginfo_t *si, void *ctx_void)
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{
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ucontext_t *ctx = (ucontext_t*)ctx_void;
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if (!want_segv) {
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clearhandler(SIGSEGV);
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return; /* Crash cleanly. */
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}
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want_segv = false;
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segv_addr = (unsigned long)si->si_addr;
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ctx->uc_mcontext.gregs[REG_RIP] += 4; /* Skip the faulting mov */
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}
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enum which_base { FS, GS };
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static unsigned long read_base(enum which_base which)
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{
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unsigned long offset;
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/*
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* Unless we have FSGSBASE, there's no direct way to do this from
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* user mode. We can get at it indirectly using signals, though.
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*/
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want_segv = true;
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offset = 0;
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if (which == FS) {
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/* Use a constant-length instruction here. */
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asm volatile ("mov %%fs:(%%rcx), %%rax" : : "c" (offset) : "rax");
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} else {
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asm volatile ("mov %%gs:(%%rcx), %%rax" : : "c" (offset) : "rax");
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}
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if (!want_segv)
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return segv_addr + offset;
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/*
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* If that didn't segfault, try the other end of the address space.
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* Unless we get really unlucky and run into the vsyscall page, this
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* is guaranteed to segfault.
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*/
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offset = (ULONG_MAX >> 1) + 1;
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if (which == FS) {
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asm volatile ("mov %%fs:(%%rcx), %%rax"
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: : "c" (offset) : "rax");
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} else {
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asm volatile ("mov %%gs:(%%rcx), %%rax"
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: : "c" (offset) : "rax");
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}
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if (!want_segv)
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return segv_addr + offset;
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abort();
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}
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static void check_gs_value(unsigned long value)
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{
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unsigned long base;
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unsigned short sel;
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printf("[RUN]\tARCH_SET_GS to 0x%lx\n", value);
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, value) != 0)
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err(1, "ARCH_SET_GS");
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asm volatile ("mov %%gs, %0" : "=rm" (sel));
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base = read_base(GS);
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if (base == value) {
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printf("[OK]\tGSBASE was set as expected (selector 0x%hx)\n",
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sel);
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} else {
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nerrs++;
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printf("[FAIL]\tGSBASE was not as expected: got 0x%lx (selector 0x%hx)\n",
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base, sel);
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}
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if (syscall(SYS_arch_prctl, ARCH_GET_GS, &base) != 0)
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err(1, "ARCH_GET_GS");
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if (base == value) {
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printf("[OK]\tARCH_GET_GS worked as expected (selector 0x%hx)\n",
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sel);
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} else {
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nerrs++;
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printf("[FAIL]\tARCH_GET_GS was not as expected: got 0x%lx (selector 0x%hx)\n",
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base, sel);
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}
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}
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static void mov_0_gs(unsigned long initial_base, bool schedule)
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{
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unsigned long base, arch_base;
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printf("[RUN]\tARCH_SET_GS to 0x%lx then mov 0 to %%gs%s\n", initial_base, schedule ? " and schedule " : "");
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, initial_base) != 0)
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err(1, "ARCH_SET_GS");
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if (schedule)
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usleep(10);
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asm volatile ("mov %0, %%gs" : : "rm" (0));
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base = read_base(GS);
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if (syscall(SYS_arch_prctl, ARCH_GET_GS, &arch_base) != 0)
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err(1, "ARCH_GET_GS");
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if (base == arch_base) {
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printf("[OK]\tGSBASE is 0x%lx\n", base);
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} else {
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nerrs++;
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printf("[FAIL]\tGSBASE changed to 0x%lx but kernel reports 0x%lx\n", base, arch_base);
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}
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}
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static volatile unsigned long remote_base;
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static volatile bool remote_hard_zero;
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static volatile unsigned int ftx;
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/*
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* ARCH_SET_FS/GS(0) may or may not program a selector of zero. HARD_ZERO
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* means to force the selector to zero to improve test coverage.
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*/
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#define HARD_ZERO 0xa1fa5f343cb85fa4
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static void do_remote_base()
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{
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unsigned long to_set = remote_base;
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bool hard_zero = false;
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if (to_set == HARD_ZERO) {
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to_set = 0;
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hard_zero = true;
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}
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, to_set) != 0)
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err(1, "ARCH_SET_GS");
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if (hard_zero)
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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unsigned short sel;
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asm volatile ("mov %%gs, %0" : "=rm" (sel));
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printf("\tother thread: ARCH_SET_GS(0x%lx)%s -- sel is 0x%hx\n",
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to_set, hard_zero ? " and clear gs" : "", sel);
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}
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void do_unexpected_base(void)
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{
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/*
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* The goal here is to try to arrange for GS == 0, GSBASE !=
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* 0, and for the the kernel the think that GSBASE == 0.
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*
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* To make the test as reliable as possible, this uses
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* explicit descriptorss. (This is not the only way. This
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* could use ARCH_SET_GS with a low, nonzero base, but the
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* relevant side effect of ARCH_SET_GS could change.)
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*/
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/* Step 1: tell the kernel that we have GSBASE == 0. */
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, 0) != 0)
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err(1, "ARCH_SET_GS");
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/* Step 2: change GSBASE without telling the kernel. */
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struct user_desc desc = {
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.entry_number = 0,
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.base_addr = 0xBAADF00D,
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.limit = 0xfffff,
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.seg_32bit = 1,
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.contents = 0, /* Data, grow-up */
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.read_exec_only = 0,
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.limit_in_pages = 1,
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.seg_not_present = 0,
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.useable = 0
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};
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if (syscall(SYS_modify_ldt, 1, &desc, sizeof(desc)) == 0) {
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printf("\tother thread: using LDT slot 0\n");
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0x7));
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} else {
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/* No modify_ldt for us (configured out, perhaps) */
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struct user_desc *low_desc = mmap(
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NULL, sizeof(desc),
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PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_32BIT, -1, 0);
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memcpy(low_desc, &desc, sizeof(desc));
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low_desc->entry_number = -1;
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/* 32-bit set_thread_area */
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long ret;
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asm volatile ("int $0x80"
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: "=a" (ret) : "a" (243), "b" (low_desc)
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: "r8", "r9", "r10", "r11");
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memcpy(&desc, low_desc, sizeof(desc));
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munmap(low_desc, sizeof(desc));
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if (ret != 0) {
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printf("[NOTE]\tcould not create a segment -- test won't do anything\n");
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return;
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}
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printf("\tother thread: using GDT slot %d\n", desc.entry_number);
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)((desc.entry_number << 3) | 0x3)));
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}
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/*
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* Step 3: set the selector back to zero. On AMD chips, this will
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* preserve GSBASE.
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*/
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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}
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static void *threadproc(void *ctx)
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{
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while (1) {
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while (ftx == 0)
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syscall(SYS_futex, &ftx, FUTEX_WAIT, 0, NULL, NULL, 0);
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if (ftx == 3)
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return NULL;
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if (ftx == 1)
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do_remote_base();
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else if (ftx == 2)
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do_unexpected_base();
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else
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errx(1, "helper thread got bad command");
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ftx = 0;
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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}
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}
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static void set_gs_and_switch_to(unsigned long local,
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unsigned short force_sel,
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unsigned long remote)
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{
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unsigned long base;
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unsigned short sel_pre_sched, sel_post_sched;
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bool hard_zero = false;
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if (local == HARD_ZERO) {
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hard_zero = true;
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local = 0;
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}
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printf("[RUN]\tARCH_SET_GS(0x%lx)%s, then schedule to 0x%lx\n",
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local, hard_zero ? " and clear gs" : "", remote);
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if (force_sel)
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printf("\tBefore schedule, set selector to 0x%hx\n", force_sel);
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, local) != 0)
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err(1, "ARCH_SET_GS");
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if (hard_zero)
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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if (read_base(GS) != local) {
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nerrs++;
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printf("[FAIL]\tGSBASE wasn't set as expected\n");
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}
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if (force_sel) {
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asm volatile ("mov %0, %%gs" : : "rm" (force_sel));
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sel_pre_sched = force_sel;
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local = read_base(GS);
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/*
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* Signal delivery seems to mess up weird selectors. Put it
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* back.
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*/
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asm volatile ("mov %0, %%gs" : : "rm" (force_sel));
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} else {
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asm volatile ("mov %%gs, %0" : "=rm" (sel_pre_sched));
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}
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remote_base = remote;
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ftx = 1;
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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while (ftx != 0)
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syscall(SYS_futex, &ftx, FUTEX_WAIT, 1, NULL, NULL, 0);
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asm volatile ("mov %%gs, %0" : "=rm" (sel_post_sched));
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base = read_base(GS);
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if (base == local && sel_pre_sched == sel_post_sched) {
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printf("[OK]\tGS/BASE remained 0x%hx/0x%lx\n",
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sel_pre_sched, local);
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} else {
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nerrs++;
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printf("[FAIL]\tGS/BASE changed from 0x%hx/0x%lx to 0x%hx/0x%lx\n",
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sel_pre_sched, local, sel_post_sched, base);
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}
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}
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static void test_unexpected_base(void)
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{
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unsigned long base;
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printf("[RUN]\tARCH_SET_GS(0), clear gs, then manipulate GSBASE in a different thread\n");
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, 0) != 0)
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err(1, "ARCH_SET_GS");
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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ftx = 2;
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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while (ftx != 0)
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syscall(SYS_futex, &ftx, FUTEX_WAIT, 1, NULL, NULL, 0);
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base = read_base(GS);
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if (base == 0) {
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printf("[OK]\tGSBASE remained 0\n");
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} else {
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nerrs++;
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printf("[FAIL]\tGSBASE changed to 0x%lx\n", base);
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}
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}
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int main()
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{
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pthread_t thread;
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sethandler(SIGSEGV, sigsegv, 0);
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check_gs_value(0);
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check_gs_value(1);
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check_gs_value(0x200000000);
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check_gs_value(0);
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check_gs_value(0x200000000);
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check_gs_value(1);
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for (int sched = 0; sched < 2; sched++) {
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mov_0_gs(0, !!sched);
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mov_0_gs(1, !!sched);
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mov_0_gs(0x200000000, !!sched);
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}
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/* Set up for multithreading. */
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cpu_set_t cpuset;
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CPU_ZERO(&cpuset);
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CPU_SET(0, &cpuset);
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if (sched_setaffinity(0, sizeof(cpuset), &cpuset) != 0)
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err(1, "sched_setaffinity to CPU 0"); /* should never fail */
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if (pthread_create(&thread, 0, threadproc, 0) != 0)
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err(1, "pthread_create");
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static unsigned long bases_with_hard_zero[] = {
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0, HARD_ZERO, 1, 0x200000000,
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};
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for (int local = 0; local < 4; local++) {
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for (int remote = 0; remote < 4; remote++) {
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for (unsigned short s = 0; s < 5; s++) {
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unsigned short sel = s;
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if (s == 4)
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asm ("mov %%ss, %0" : "=rm" (sel));
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set_gs_and_switch_to(
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bases_with_hard_zero[local],
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sel,
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bases_with_hard_zero[remote]);
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}
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}
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}
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test_unexpected_base();
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ftx = 3; /* Kill the thread. */
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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if (pthread_join(thread, NULL) != 0)
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err(1, "pthread_join");
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return nerrs == 0 ? 0 : 1;
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}
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