177 lines
4.2 KiB
C
177 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 MediaTek Inc.
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*/
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#ifndef __MTK_SMI_H__
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#define __MTK_SMI_H__
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#define MTK_SMI_MAJOR_NUMBER 190
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enum MTK_SMI_BWC_SCEN {
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SMI_BWC_SCEN_NORMAL,
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SMI_BWC_SCEN_UI_IDLE,
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SMI_BWC_SCEN_VPMJC,
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SMI_BWC_SCEN_FORCE_MMDVFS,
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SMI_BWC_SCEN_HDMI,
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SMI_BWC_SCEN_HDMI4K,
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SMI_BWC_SCEN_WFD,
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SMI_BWC_SCEN_VENC,
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SMI_BWC_SCEN_SWDEC_VP,
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SMI_BWC_SCEN_VP,
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SMI_BWC_SCEN_VP_HIGH_FPS,
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SMI_BWC_SCEN_VP_HIGH_RESOLUTION,
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SMI_BWC_SCEN_VR,
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SMI_BWC_SCEN_VR_SLOW,
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SMI_BWC_SCEN_VSS,
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SMI_BWC_SCEN_CAM_PV,
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SMI_BWC_SCEN_CAM_CP,
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SMI_BWC_SCEN_ICFP,
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SMI_BWC_SCEN_MM_GPU,
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SMI_BWC_SCEN_CNT
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};
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static char *MTK_SMI_BWC_SCEN_NAME[SMI_BWC_SCEN_CNT] = {
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"SMI_BWC_SCEN_NORMAL", "SMI_BWC_SCEN_UI_IDLE", "SMI_BWC_SCEN_VPMJC",
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"SMI_BWC_SCEN_FORCE_MMDVFS", "SMI_BWC_SCEN_HDMI", "SMI_BWC_SCEN_HDMI4K",
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"SMI_BWC_SCEN_WFD", "SMI_BWC_SCEN_SWDEC_VP",
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/* libvcodec */
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"SMI_BWC_SCEN_VP", "SMI_BWC_SCEN_VP_HIGH_FPS",
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"SMI_BWC_SCEN_VP_HIGH_RESOLUTION", "SMI_BWC_SCEN_VENC",
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/* mtkcam */
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"SMI_BWC_SCEN_VR", "SMI_BWC_SCEN_VR_SLOW", "SMI_BWC_SCEN_VSS",
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"SMI_BWC_SCEN_CAM_PV", "SMI_BWC_SCEN_CAM_CP", "SMI_BWC_SCEN_ICFP",
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"SMI_BWC_SCEN_MM_GPU",
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};
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static inline char *smi_bwc_scen_name_get(const enum MTK_SMI_BWC_SCEN scen)
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{
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if (scen >= 0 && scen < SMI_BWC_SCEN_CNT)
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return MTK_SMI_BWC_SCEN_NAME[scen];
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else
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return "SMI_BWC_SCEN_UNKNOWN";
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}
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struct MTK_SMI_BWC_CONF {
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u32 scen;
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u32 b_on;
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};
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#define MTK_IOC_SMI_BWC_CONF _IOW('O', 24, struct MTK_SMI_BWC_CONF)
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enum {SMI_IPI_INIT, SMI_IPI_ENABLE, NR_SMI_IPI,};
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struct smi_ipi_data_s {
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u32 cmd;
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union {
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struct {
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u32 phys;
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u32 size;
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} ctrl;
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struct {
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u32 enable;
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} logger;
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} u;
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};
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/* MMDVFS */
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enum mmdvfs_voltage_enum {
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MMDVFS_VOLTAGE_DEFAULT,
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MMDVFS_VOLTAGE_0 = MMDVFS_VOLTAGE_DEFAULT,
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MMDVFS_VOLTAGE_LOW = MMDVFS_VOLTAGE_0,
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MMDVFS_VOLTAGE_1,
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MMDVFS_VOLTAGE_HIGH = MMDVFS_VOLTAGE_1,
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MMDVFS_VOLTAGE_DEFAULT_STEP,
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MMDVFS_VOLTAGE_LOW_LOW,
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MMDVFS_VOLTAGE_COUNT
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};
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#define MMDVFS_CAMERA_MODE_FLAG_DEFAULT 1
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#define MMDVFS_CAMERA_MODE_FLAG_PIP (1 << 1)
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#define MMDVFS_CAMERA_MODE_FLAG_VFB (1 << 2)
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#define MMDVFS_CAMERA_MODE_FLAG_EIS_2_0 (1 << 3)
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#define MMDVFS_CAMERA_MODE_FLAG_IVHDR (1 << 4)
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#define MMDVFS_CAMERA_MODE_FLAG_STEREO (1 << 5)
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#define MMDVFS_CAMERA_MODE_FLAG_MVHDR (1 << 6)
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#define MMDVFS_CAMERA_MODE_FLAG_ZVHDR (1 << 7)
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#define MMDVFS_CAMERA_MODE_FLAG_DUAL_ZOOM (1 << 8)
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struct MTK_MMDVFS_CMD {
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unsigned int type;
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enum MTK_SMI_BWC_SCEN scen;
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unsigned int sensor_size;
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unsigned int sensor_fps;
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unsigned int camera_mode;
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unsigned int boost_disable;
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unsigned int ddr_type;
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unsigned int step;
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unsigned int venc_size;
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unsigned int preview_size;
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unsigned int ret;
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};
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#define MTK_MMDVFS_CMD_TYPE_SET 0
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#define MTK_MMDVFS_CMD_TYPE_QUERY 1
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#define MTK_MMDVFS_CMD_TYPE_GET 2
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#define MTK_MMDVFS_CMD_TYPE_CONFIG 3
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#define MTK_MMDVFS_CMD_TYPE_STEP_SET 4
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#define MTK_MMDVFS_CMD_TYPE_VPU_STEP_SET 10
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#define MTK_MMDVFS_CMD_TYPE_VPU_STEP_GET 11
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enum MTK_SMI_BWC_INFO_ID {
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SMI_BWC_INFO_CON_PROFILE = 0,
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SMI_BWC_INFO_SENSOR_SIZE,
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SMI_BWC_INFO_VIDEO_RECORD_SIZE,
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SMI_BWC_INFO_DISP_SIZE,
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SMI_BWC_INFO_TV_OUT_SIZE,
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SMI_BWC_INFO_FPS,
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SMI_BWC_INFO_VIDEO_ENCODE_CODEC,
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SMI_BWC_INFO_VIDEO_DECODE_CODEC,
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SMI_BWC_INFO_HW_OVL_LIMIT,
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SMI_BWC_INFO_CNT
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};
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struct MTK_SMI_BWC_INFO_SET {
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int property;
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int value1;
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int value2;
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};
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struct MTK_SMI_BWC_MM_INFO {
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unsigned int flag; /* Reserved */
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int concurrent_profile;
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int sensor_size[2];
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int video_record_size[2];
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int display_size[2];
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int tv_out_size[2];
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int fps;
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int video_encode_codec;
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int video_decode_codec;
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int hw_ovl_limit;
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};
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#define MTK_IOC_SMI_BWC_INFO_SET _IOWR('O', 28, struct MTK_SMI_BWC_INFO_SET)
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#define MTK_IOC_SMI_BWC_INFO_GET _IOWR('O', 29, struct MTK_SMI_BWC_MM_INFO)
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#define MTK_IOC_MMDVFS_CMD _IOW('O', 88, struct MTK_MMDVFS_CMD)
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struct MTK_MMDVFS_QOS_CMD {
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unsigned int type;
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unsigned int max_cam_bw;
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unsigned int ret;
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};
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#define MTK_MMDVFS_QOS_CMD_TYPE_SET 0
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#define MTK_IOC_MMDVFS_QOS_CMD \
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_IOW('O', 89, struct MTK_MMDVFS_QOS_CMD)
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#ifdef CONFIG_MTK_SMI_VARIANT
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int mtk_smi_larb_clock_on(int larbid, bool pm);
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void mtk_smi_larb_clock_off(int larbid, bool pm);
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unsigned long mtk_smi_larb_get_base(int larbid);
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#endif
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#endif
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