6db4831e98
Android 14
68 lines
1.4 KiB
C
68 lines
1.4 KiB
C
/*
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* Support functions for the SH5 PCI hardware.
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*
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* Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
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* Copyright (C) 2003, 2004 Paul Mundt
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* Copyright (C) 2004 Richard Curnow
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*/
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#include <linux/kernel.h>
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#include <linux/rwsem.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include "pci-sh5.h"
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static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *val)
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{
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SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
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switch (size) {
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case 1:
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*val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
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break;
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case 2:
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*val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
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break;
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case 4:
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*val = SH5PCI_READ(PDR);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 val)
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{
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SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
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switch (size) {
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case 1:
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SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
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break;
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case 2:
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SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
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break;
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case 4:
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SH5PCI_WRITE(PDR, val);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops sh5_pci_ops = {
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.read = sh5pci_read,
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.write = sh5pci_write,
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};
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