6db4831e98
Android 14
148 lines
2.8 KiB
C
148 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SH_BITOPS_LLSC_H
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#define __ASM_SH_BITOPS_LLSC_H
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static inline void set_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%1, %0 ! set_bit \n\t"
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"or %2, %0 \n\t"
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"movco.l %0, @%1 \n\t"
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"bf 1b \n\t"
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: "=&z" (tmp)
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: "r" (a), "r" (mask)
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: "t", "memory"
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);
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}
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static inline void clear_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%1, %0 ! clear_bit \n\t"
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"and %2, %0 \n\t"
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"movco.l %0, @%1 \n\t"
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"bf 1b \n\t"
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: "=&z" (tmp)
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: "r" (a), "r" (~mask)
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: "t", "memory"
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);
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}
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static inline void change_bit(int nr, volatile void *addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%1, %0 ! change_bit \n\t"
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"xor %2, %0 \n\t"
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"movco.l %0, @%1 \n\t"
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"bf 1b \n\t"
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: "=&z" (tmp)
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: "r" (a), "r" (mask)
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: "t", "memory"
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);
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}
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static inline int test_and_set_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! test_and_set_bit \n\t"
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"mov %0, %1 \n\t"
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"or %3, %0 \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"and %3, %1 \n\t"
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: "=&z" (tmp), "=&r" (retval)
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: "r" (a), "r" (mask)
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: "t", "memory"
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);
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return retval != 0;
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}
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static inline int test_and_clear_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! test_and_clear_bit \n\t"
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"mov %0, %1 \n\t"
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"and %4, %0 \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"and %3, %1 \n\t"
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"synco \n\t"
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: "=&z" (tmp), "=&r" (retval)
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: "r" (a), "r" (mask), "r" (~mask)
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: "t", "memory"
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);
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return retval != 0;
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}
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static inline int test_and_change_bit(int nr, volatile void *addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long tmp;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! test_and_change_bit \n\t"
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"mov %0, %1 \n\t"
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"xor %3, %0 \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"and %3, %1 \n\t"
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"synco \n\t"
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: "=&z" (tmp), "=&r" (retval)
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: "r" (a), "r" (mask)
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: "t", "memory"
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);
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return retval != 0;
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}
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#include <asm-generic/bitops/non-atomic.h>
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#endif /* __ASM_SH_BITOPS_LLSC_H */
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