325 lines
9.4 KiB
C
325 lines
9.4 KiB
C
/*
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* Copyright 2012 STEC, Inc.
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* Copyright (c) 2017 Western Digital Corporation or its affiliates.
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*
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* This file is part of the Linux kernel, and is made available under
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* the terms of the GNU General Public License version 2.
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*/
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#ifndef SKD_S1120_H
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#define SKD_S1120_H
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/*
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* Q-channel, 64-bit r/w
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*/
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#define FIT_Q_COMMAND 0x400u
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#define FIT_QCMD_QID_MASK (0x3 << 1)
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#define FIT_QCMD_QID0 (0x0 << 1)
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#define FIT_QCMD_QID_NORMAL FIT_QCMD_QID0
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#define FIT_QCMD_QID1 (0x1 << 1)
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#define FIT_QCMD_QID2 (0x2 << 1)
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#define FIT_QCMD_QID3 (0x3 << 1)
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#define FIT_QCMD_FLUSH_QUEUE (0ull) /* add QID */
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#define FIT_QCMD_MSGSIZE_MASK (0x3 << 4)
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#define FIT_QCMD_MSGSIZE_64 (0x0 << 4)
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#define FIT_QCMD_MSGSIZE_128 (0x1 << 4)
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#define FIT_QCMD_MSGSIZE_256 (0x2 << 4)
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#define FIT_QCMD_MSGSIZE_512 (0x3 << 4)
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#define FIT_QCMD_ALIGN L1_CACHE_BYTES
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/*
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* Control, 32-bit r/w
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*/
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#define FIT_CONTROL 0x500u
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#define FIT_CR_HARD_RESET (1u << 0u)
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#define FIT_CR_SOFT_RESET (1u << 1u)
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#define FIT_CR_DIS_TIMESTAMPS (1u << 6u)
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#define FIT_CR_ENABLE_INTERRUPTS (1u << 7u)
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/*
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* Status, 32-bit, r/o
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*/
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#define FIT_STATUS 0x510u
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#define FIT_SR_DRIVE_STATE_MASK 0x000000FFu
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#define FIT_SR_SIGNATURE (0xFF << 8)
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#define FIT_SR_PIO_DMA (1 << 16)
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#define FIT_SR_DRIVE_OFFLINE 0x00
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#define FIT_SR_DRIVE_INIT 0x01
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/* #define FIT_SR_DRIVE_READY 0x02 */
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#define FIT_SR_DRIVE_ONLINE 0x03
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#define FIT_SR_DRIVE_BUSY 0x04
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#define FIT_SR_DRIVE_FAULT 0x05
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#define FIT_SR_DRIVE_DEGRADED 0x06
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#define FIT_SR_PCIE_LINK_DOWN 0x07
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#define FIT_SR_DRIVE_SOFT_RESET 0x08
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#define FIT_SR_DRIVE_INIT_FAULT 0x09
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#define FIT_SR_DRIVE_BUSY_SANITIZE 0x0A
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#define FIT_SR_DRIVE_BUSY_ERASE 0x0B
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#define FIT_SR_DRIVE_FW_BOOTING 0x0C
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#define FIT_SR_DRIVE_NEED_FW_DOWNLOAD 0xFE
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#define FIT_SR_DEVICE_MISSING 0xFF
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#define FIT_SR__RESERVED 0xFFFFFF00u
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/*
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* FIT_STATUS - Status register data definition
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*/
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#define FIT_SR_STATE_MASK (0xFF << 0)
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#define FIT_SR_SIGNATURE (0xFF << 8)
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#define FIT_SR_PIO_DMA (1 << 16)
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/*
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* Interrupt status, 32-bit r/w1c (w1c ==> write 1 to clear)
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*/
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#define FIT_INT_STATUS_HOST 0x520u
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#define FIT_ISH_FW_STATE_CHANGE (1u << 0u)
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#define FIT_ISH_COMPLETION_POSTED (1u << 1u)
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#define FIT_ISH_MSG_FROM_DEV (1u << 2u)
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#define FIT_ISH_UNDEFINED_3 (1u << 3u)
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#define FIT_ISH_UNDEFINED_4 (1u << 4u)
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#define FIT_ISH_Q0_FULL (1u << 5u)
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#define FIT_ISH_Q1_FULL (1u << 6u)
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#define FIT_ISH_Q2_FULL (1u << 7u)
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#define FIT_ISH_Q3_FULL (1u << 8u)
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#define FIT_ISH_QCMD_FIFO_OVERRUN (1u << 9u)
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#define FIT_ISH_BAD_EXP_ROM_READ (1u << 10u)
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#define FIT_INT_DEF_MASK \
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(FIT_ISH_FW_STATE_CHANGE | \
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FIT_ISH_COMPLETION_POSTED | \
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FIT_ISH_MSG_FROM_DEV | \
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FIT_ISH_Q0_FULL | \
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FIT_ISH_Q1_FULL | \
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FIT_ISH_Q2_FULL | \
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FIT_ISH_Q3_FULL | \
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FIT_ISH_QCMD_FIFO_OVERRUN | \
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FIT_ISH_BAD_EXP_ROM_READ)
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#define FIT_INT_QUEUE_FULL \
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(FIT_ISH_Q0_FULL | \
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FIT_ISH_Q1_FULL | \
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FIT_ISH_Q2_FULL | \
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FIT_ISH_Q3_FULL)
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#define MSI_MSG_NWL_ERROR_0 0x00000000
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#define MSI_MSG_NWL_ERROR_1 0x00000001
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#define MSI_MSG_NWL_ERROR_2 0x00000002
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#define MSI_MSG_NWL_ERROR_3 0x00000003
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#define MSI_MSG_STATE_CHANGE 0x00000004
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#define MSI_MSG_COMPLETION_POSTED 0x00000005
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#define MSI_MSG_MSG_FROM_DEV 0x00000006
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#define MSI_MSG_RESERVED_0 0x00000007
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#define MSI_MSG_RESERVED_1 0x00000008
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#define MSI_MSG_QUEUE_0_FULL 0x00000009
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#define MSI_MSG_QUEUE_1_FULL 0x0000000A
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#define MSI_MSG_QUEUE_2_FULL 0x0000000B
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#define MSI_MSG_QUEUE_3_FULL 0x0000000C
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#define FIT_INT_RESERVED_MASK \
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(FIT_ISH_UNDEFINED_3 | \
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FIT_ISH_UNDEFINED_4)
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/*
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* Interrupt mask, 32-bit r/w
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* Bit definitions are the same as FIT_INT_STATUS_HOST
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*/
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#define FIT_INT_MASK_HOST 0x528u
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/*
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* Message to device, 32-bit r/w
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*/
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#define FIT_MSG_TO_DEVICE 0x540u
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/*
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* Message from device, 32-bit, r/o
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*/
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#define FIT_MSG_FROM_DEVICE 0x548u
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/*
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* 32-bit messages to/from device, composition/extraction macros
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*/
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#define FIT_MXD_CONS(TYPE, PARAM, DATA) \
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((((TYPE) & 0xFFu) << 24u) | \
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(((PARAM) & 0xFFu) << 16u) | \
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(((DATA) & 0xFFFFu) << 0u))
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#define FIT_MXD_TYPE(MXD) (((MXD) >> 24u) & 0xFFu)
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#define FIT_MXD_PARAM(MXD) (((MXD) >> 16u) & 0xFFu)
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#define FIT_MXD_DATA(MXD) (((MXD) >> 0u) & 0xFFFFu)
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/*
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* Types of messages to/from device
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*/
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#define FIT_MTD_FITFW_INIT 0x01u
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#define FIT_MTD_GET_CMDQ_DEPTH 0x02u
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#define FIT_MTD_SET_COMPQ_DEPTH 0x03u
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#define FIT_MTD_SET_COMPQ_ADDR 0x04u
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#define FIT_MTD_ARM_QUEUE 0x05u
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#define FIT_MTD_CMD_LOG_HOST_ID 0x07u
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#define FIT_MTD_CMD_LOG_TIME_STAMP_LO 0x08u
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#define FIT_MTD_CMD_LOG_TIME_STAMP_HI 0x09u
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#define FIT_MFD_SMART_EXCEEDED 0x10u
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#define FIT_MFD_POWER_DOWN 0x11u
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#define FIT_MFD_OFFLINE 0x12u
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#define FIT_MFD_ONLINE 0x13u
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#define FIT_MFD_FW_RESTARTING 0x14u
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#define FIT_MFD_PM_ACTIVE 0x15u
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#define FIT_MFD_PM_STANDBY 0x16u
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#define FIT_MFD_PM_SLEEP 0x17u
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#define FIT_MFD_CMD_PROGRESS 0x18u
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#define FIT_MTD_DEBUG 0xFEu
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#define FIT_MFD_DEBUG 0xFFu
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#define FIT_MFD_MASK (0xFFu)
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#define FIT_MFD_DATA_MASK (0xFFu)
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#define FIT_MFD_MSG(x) (((x) >> 24) & FIT_MFD_MASK)
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#define FIT_MFD_DATA(x) ((x) & FIT_MFD_MASK)
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/*
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* Extra arg to FIT_MSG_TO_DEVICE, 64-bit r/w
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* Used to set completion queue address (FIT_MTD_SET_COMPQ_ADDR)
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* (was Response buffer in docs)
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*/
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#define FIT_MSG_TO_DEVICE_ARG 0x580u
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/*
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* Hardware (ASIC) version, 32-bit r/o
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*/
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#define FIT_HW_VERSION 0x588u
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/*
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* Scatter/gather list descriptor.
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* 32-bytes and must be aligned on a 32-byte boundary.
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* All fields are in little endian order.
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*/
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struct fit_sg_descriptor {
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uint32_t control;
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uint32_t byte_count;
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uint64_t host_side_addr;
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uint64_t dev_side_addr;
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uint64_t next_desc_ptr;
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};
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#define FIT_SGD_CONTROL_NOT_LAST 0x000u
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#define FIT_SGD_CONTROL_LAST 0x40Eu
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/*
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* Header at the beginning of a FIT message. The header
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* is followed by SSDI requests each 64 bytes.
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* A FIT message can be up to 512 bytes long and must start
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* on a 64-byte boundary.
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*/
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struct fit_msg_hdr {
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uint8_t protocol_id;
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uint8_t num_protocol_cmds_coalesced;
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uint8_t _reserved[62];
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};
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#define FIT_PROTOCOL_ID_FIT 1
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#define FIT_PROTOCOL_ID_SSDI 2
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#define FIT_PROTOCOL_ID_SOFIT 3
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#define FIT_PROTOCOL_MINOR_VER(mtd_val) ((mtd_val >> 16) & 0xF)
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#define FIT_PROTOCOL_MAJOR_VER(mtd_val) ((mtd_val >> 20) & 0xF)
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/*
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* Format of a completion entry. The completion queue is circular
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* and must have at least as many entries as the maximum number
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* of commands that may be issued to the device.
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*
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* There are no head/tail pointers. The cycle value is used to
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* infer the presence of new completion records.
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* Initially the cycle in all entries is 0, the index is 0, and
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* the cycle value to expect is 1. When completions are added
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* their cycle values are set to 1. When the index wraps the
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* cycle value to expect is incremented.
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*
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* Command_context is opaque and taken verbatim from the SSDI command.
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* All other fields are big endian.
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*/
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#define FIT_PROTOCOL_VERSION_0 0
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/*
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* Protocol major version 1 completion entry.
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* The major protocol version is found in bits
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* 20-23 of the FIT_MTD_FITFW_INIT response.
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*/
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struct fit_completion_entry_v1 {
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__be32 num_returned_bytes;
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uint16_t tag;
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uint8_t status; /* SCSI status */
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uint8_t cycle;
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};
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#define FIT_PROTOCOL_VERSION_1 1
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#define FIT_PROTOCOL_VERSION_CURRENT FIT_PROTOCOL_VERSION_1
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struct fit_comp_error_info {
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uint8_t type:7; /* 00: Bits0-6 indicates the type of sense data. */
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uint8_t valid:1; /* 00: Bit 7 := 1 ==> info field is valid. */
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uint8_t reserved0; /* 01: Obsolete field */
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uint8_t key:4; /* 02: Bits0-3 indicate the sense key. */
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uint8_t reserved2:1; /* 02: Reserved bit. */
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uint8_t bad_length:1; /* 02: Incorrect Length Indicator */
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uint8_t end_medium:1; /* 02: End of Medium */
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uint8_t file_mark:1; /* 02: Filemark */
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uint8_t info[4]; /* 03: */
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uint8_t reserved1; /* 07: Additional Sense Length */
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uint8_t cmd_spec[4]; /* 08: Command Specific Information */
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uint8_t code; /* 0C: Additional Sense Code */
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uint8_t qual; /* 0D: Additional Sense Code Qualifier */
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uint8_t fruc; /* 0E: Field Replaceable Unit Code */
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uint8_t sks_high:7; /* 0F: Sense Key Specific (MSB) */
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uint8_t sks_valid:1; /* 0F: Sense Key Specific Valid */
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uint16_t sks_low; /* 10: Sense Key Specific (LSW) */
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uint16_t reserved3; /* 12: Part of additional sense bytes (unused) */
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uint16_t uec; /* 14: Additional Sense Bytes */
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uint64_t per __packed; /* 16: Additional Sense Bytes */
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uint8_t reserved4[2]; /* 1E: Additional Sense Bytes (unused) */
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};
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/* Task management constants */
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#define SOFT_TASK_SIMPLE 0x00
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#define SOFT_TASK_HEAD_OF_QUEUE 0x01
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#define SOFT_TASK_ORDERED 0x02
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/* Version zero has the last 32 bits reserved,
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* Version one has the last 32 bits sg_list_len_bytes;
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*/
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struct skd_command_header {
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__be64 sg_list_dma_address;
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uint16_t tag;
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uint8_t attribute;
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uint8_t add_cdb_len; /* In 32 bit words */
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__be32 sg_list_len_bytes;
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};
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struct skd_scsi_request {
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struct skd_command_header hdr;
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unsigned char cdb[16];
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/* unsigned char _reserved[16]; */
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};
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struct driver_inquiry_data {
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uint8_t peripheral_device_type:5;
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uint8_t qualifier:3;
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uint8_t page_code;
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__be16 page_length;
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__be16 pcie_bus_number;
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uint8_t pcie_device_number;
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uint8_t pcie_function_number;
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uint8_t pcie_link_speed;
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uint8_t pcie_link_lanes;
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__be16 pcie_vendor_id;
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__be16 pcie_device_id;
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__be16 pcie_subsystem_vendor_id;
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__be16 pcie_subsystem_device_id;
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uint8_t reserved1[2];
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uint8_t reserved2[3];
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uint8_t driver_version_length;
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uint8_t driver_version[0x14];
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};
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#endif /* SKD_S1120_H */
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