64 lines
1.9 KiB
Plaintext
64 lines
1.9 KiB
Plaintext
STMicroelectronics STM32 DAC
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The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC
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may be configured in 8 or 12-bit mode. It has two output channels, each with
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its own converter.
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It has built-in noise and triangle waveform generator and supports external
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triggers for conversions. The DAC's output buffer allows a high drive output
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current.
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Contents of a stm32 dac root node:
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-----------------------------------
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Required properties:
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- compatible: Should be one of:
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"st,stm32f4-dac-core"
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"st,stm32h7-dac-core"
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- reg: Offset and length of the device's register set.
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- clocks: Must contain an entry for pclk (which feeds the peripheral bus
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interface)
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- clock-names: Must be "pclk".
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- vref-supply: Phandle to the vref+ input analog reference supply.
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- #address-cells = <1>;
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- #size-cells = <0>;
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Optional properties:
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- resets: Must contain the phandle to the reset controller.
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- A pinctrl state named "default" for each DAC channel may be defined to set
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DAC_OUTx pin in mode of operation for analog output on external pin.
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Contents of a stm32 dac child node:
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-----------------------------------
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DAC core node should contain at least one subnode, representing a
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DAC instance/channel available on the machine.
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Required properties:
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- compatible: Must be "st,stm32-dac".
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- reg: Must be either 1 or 2, to define (single) channel in use
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- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in
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Documentation/devicetree/bindings/iio/iio-bindings.txt
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Example:
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dac: dac@40007400 {
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compatible = "st,stm32h7-dac-core";
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reg = <0x40007400 0x400>;
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clocks = <&clk>;
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clock-names = "pclk";
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vref-supply = <®_vref>;
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pinctrl-names = "default";
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pinctrl-0 = <&dac_out1 &dac_out2>;
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#address-cells = <1>;
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#size-cells = <0>;
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dac1: dac@1 {
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compatible = "st,stm32-dac";
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#io-channels-cells = <1>;
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reg = <1>;
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};
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dac2: dac@2 {
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compatible = "st,stm32-dac";
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#io-channels-cells = <1>;
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reg = <2>;
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};
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};
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