373 lines
13 KiB
C
373 lines
13 KiB
C
/*
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* linux/include/linux/mmc/card.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Card driver specific definitions.
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*/
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#ifndef LINUX_MMC_CARD_H
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#define LINUX_MMC_CARD_H
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#include <linux/device.h>
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#include <linux/mod_devicetable.h>
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#define MAX_CNT_U64 0xFFFFFFFFFF
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#define MAX_CNT_U32 0x7FFFFFFF
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#define STATUS_MASK (R1_ERROR | R1_CC_ERROR | R1_CARD_ECC_FAILED |\
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R1_WP_VIOLATION | R1_OUT_OF_RANGE)
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/* Only [0:4] bits in response are reserved. The other bits shouldn't be used */
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#define HALT_UNHALT_ERR 0x00000001
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#define CQ_EN_DIS_ERR 0x00000002
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#define RPMB_SWITCH_ERR 0x00000004
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#define HW_RST 0x00000008
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#define STATUS_ERR_MASK (HALT_UNHALT_ERR | CQ_EN_DIS_ERR |\
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RPMB_SWITCH_ERR | HW_RST)
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#define MAX_REQ_TYPE_INDEX 5 // sbc, cmd, data, stop, busy
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#define MAX_ERR_TYPE_INDEX 2 // timeout, crc
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#define MAX_ERR_LOG_INDEX (MAX_REQ_TYPE_INDEX * MAX_ERR_TYPE_INDEX)
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struct mmc_blk_request;
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struct mmc_cid {
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unsigned int manfid;
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char prod_name[8];
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unsigned char prv;
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unsigned int serial;
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unsigned short oemid;
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unsigned short year;
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unsigned char hwrev;
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unsigned char fwrev;
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unsigned char month;
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};
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struct mmc_csd {
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unsigned char structure;
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unsigned char mmca_vsn;
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unsigned short cmdclass;
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unsigned short taac_clks;
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unsigned int taac_ns;
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unsigned int c_size;
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unsigned int r2w_factor;
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unsigned int max_dtr;
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unsigned int erase_size; /* In sectors */
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unsigned int wp_grp_size;
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unsigned int read_blkbits;
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unsigned int write_blkbits;
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unsigned int capacity;
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unsigned int read_partial:1,
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read_misalign:1,
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write_partial:1,
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write_misalign:1,
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dsr_imp:1;
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};
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struct mmc_ext_csd {
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u8 rev;
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u8 erase_group_def;
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u8 sec_feature_support;
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u8 rel_sectors;
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u8 rel_param;
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u8 part_config;
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u8 cache_ctrl;
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u8 rst_n_function;
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u8 max_packed_writes;
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u8 max_packed_reads;
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u8 packed_event_en;
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unsigned int part_time; /* Units: ms */
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unsigned int sa_timeout; /* Units: 100ns */
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unsigned int generic_cmd6_time; /* Units: 10ms */
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unsigned int power_off_longtime; /* Units: ms */
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u8 power_off_notification; /* state */
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unsigned int hs_max_dtr;
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unsigned int hs200_max_dtr;
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#define MMC_HIGH_26_MAX_DTR 26000000
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#define MMC_HIGH_52_MAX_DTR 52000000
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#define MMC_HIGH_DDR_MAX_DTR 52000000
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#define MMC_HS200_MAX_DTR 200000000
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unsigned int sectors;
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unsigned int hc_erase_size; /* In sectors */
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unsigned int hc_erase_timeout; /* In milliseconds */
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unsigned int sec_trim_mult; /* Secure trim multiplier */
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unsigned int sec_erase_mult; /* Secure erase multiplier */
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unsigned int trim_timeout; /* In milliseconds */
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bool partition_setting_completed; /* enable bit */
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unsigned long long enhanced_area_offset; /* Units: Byte */
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unsigned int enhanced_area_size; /* Units: KB */
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unsigned int cache_size; /* Units: KB */
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bool hpi_en; /* HPI enablebit */
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bool hpi; /* HPI support bit */
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unsigned int hpi_cmd; /* cmd used as HPI */
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bool bkops; /* background support bit */
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bool man_bkops_en; /* manual bkops enable bit */
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bool auto_bkops_en; /* auto bkops enable bit */
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unsigned int data_sector_size; /* 512 bytes or 4KB */
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unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
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unsigned int boot_ro_lock; /* ro lock support */
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bool boot_ro_lockable;
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bool ffu_capable; /* Firmware upgrade support */
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bool cmdq_en; /* Command Queue enabled */
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bool cmdq_support; /* Command Queue supported */
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unsigned int cmdq_depth; /* Command Queue depth */
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#define MMC_FIRMWARE_LEN 8
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u8 fwrev[MMC_FIRMWARE_LEN]; /* FW version */
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u8 raw_exception_status; /* 54 */
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u8 raw_partition_support; /* 160 */
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u8 raw_rpmb_size_mult; /* 168 */
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u8 raw_erased_mem_count; /* 181 */
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u8 strobe_support; /* 184 */
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u8 raw_ext_csd_structure; /* 194 */
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u8 raw_card_type; /* 196 */
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u8 raw_driver_strength; /* 197 */
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u8 out_of_int_time; /* 198 */
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u8 raw_pwr_cl_52_195; /* 200 */
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u8 raw_pwr_cl_26_195; /* 201 */
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u8 raw_pwr_cl_52_360; /* 202 */
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u8 raw_pwr_cl_26_360; /* 203 */
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u8 raw_s_a_timeout; /* 217 */
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u8 raw_hc_erase_gap_size; /* 221 */
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u8 raw_erase_timeout_mult; /* 223 */
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u8 raw_hc_erase_grp_size; /* 224 */
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u8 raw_sec_trim_mult; /* 229 */
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u8 raw_sec_erase_mult; /* 230 */
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u8 raw_sec_feature_support;/* 231 */
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u8 raw_trim_mult; /* 232 */
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u8 raw_pwr_cl_200_195; /* 236 */
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u8 raw_pwr_cl_200_360; /* 237 */
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u8 raw_pwr_cl_ddr_52_195; /* 238 */
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u8 raw_pwr_cl_ddr_52_360; /* 239 */
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u8 raw_pwr_cl_ddr_200_360; /* 253 */
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u8 raw_bkops_status; /* 246 */
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u8 raw_sectors[4]; /* 212 - 4 bytes */
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u8 pre_eol_info; /* 267 */
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u8 device_life_time_est_typ_a; /* 268 */
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u8 device_life_time_est_typ_b; /* 269 */
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unsigned int feature_support;
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#define MMC_DISCARD_FEATURE BIT(0) /* CMD38 feature */
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};
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struct sd_scr {
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unsigned char sda_vsn;
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unsigned char sda_spec3;
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unsigned char bus_widths;
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#define SD_SCR_BUS_WIDTH_1 (1<<0)
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#define SD_SCR_BUS_WIDTH_4 (1<<2)
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unsigned char cmds;
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#define SD_SCR_CMD20_SUPPORT (1<<0)
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#define SD_SCR_CMD23_SUPPORT (1<<1)
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};
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struct sd_ssr {
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unsigned int au; /* In sectors */
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unsigned int erase_timeout; /* In milliseconds */
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unsigned int erase_offset; /* In milliseconds */
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};
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struct sd_switch_caps {
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unsigned int hs_max_dtr;
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unsigned int uhs_max_dtr;
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#define HIGH_SPEED_MAX_DTR 50000000
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#define UHS_SDR104_MAX_DTR 208000000
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#define UHS_SDR50_MAX_DTR 100000000
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#define UHS_DDR50_MAX_DTR 50000000
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#define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR
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#define UHS_SDR12_MAX_DTR 25000000
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#define DEFAULT_SPEED_MAX_DTR UHS_SDR12_MAX_DTR
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unsigned int sd3_bus_mode;
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#define UHS_SDR12_BUS_SPEED 0
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#define HIGH_SPEED_BUS_SPEED 1
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#define UHS_SDR25_BUS_SPEED 1
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#define UHS_SDR50_BUS_SPEED 2
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#define UHS_SDR104_BUS_SPEED 3
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#define UHS_DDR50_BUS_SPEED 4
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#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
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#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
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#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
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#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
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#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED)
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#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED)
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unsigned int sd3_drv_type;
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#define SD_DRIVER_TYPE_B 0x01
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#define SD_DRIVER_TYPE_A 0x02
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#define SD_DRIVER_TYPE_C 0x04
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#define SD_DRIVER_TYPE_D 0x08
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unsigned int sd3_curr_limit;
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#define SD_SET_CURRENT_LIMIT_200 0
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#define SD_SET_CURRENT_LIMIT_400 1
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#define SD_SET_CURRENT_LIMIT_600 2
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#define SD_SET_CURRENT_LIMIT_800 3
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#define SD_SET_CURRENT_NO_CHANGE (-1)
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#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
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#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
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#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600)
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#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800)
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};
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struct sdio_cccr {
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unsigned int sdio_vsn;
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unsigned int sd_vsn;
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unsigned int multi_block:1,
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low_speed:1,
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wide_bus:1,
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high_power:1,
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high_speed:1,
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disable_cd:1;
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};
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struct sdio_cis {
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unsigned short vendor;
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unsigned short device;
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unsigned short blksize;
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unsigned int max_dtr;
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};
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struct mmc_host;
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struct sdio_func;
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struct sdio_func_tuple;
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struct mmc_queue_req;
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#define SDIO_MAX_FUNCS 7
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/* The number of MMC physical partitions. These consist of:
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* boot partitions (2), general purpose partitions (4) and
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* RPMB partition (1) in MMC v4.4.
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*/
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#define MMC_NUM_BOOT_PARTITION 2
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#define MMC_NUM_GP_PARTITION 4
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#define MMC_NUM_PHY_PARTITION 7
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#define MAX_MMC_PART_NAME_LEN 20
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/*
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* MMC Physical partitions
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*/
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struct mmc_part {
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u64 size; /* partition size (in bytes) */
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unsigned int part_cfg; /* partition type */
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char name[MAX_MMC_PART_NAME_LEN];
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bool force_ro; /* to make boot parts RO by default */
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unsigned int area_type;
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#define MMC_BLK_DATA_AREA_MAIN (1<<0)
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#define MMC_BLK_DATA_AREA_BOOT (1<<1)
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#define MMC_BLK_DATA_AREA_GP (1<<2)
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#define MMC_BLK_DATA_AREA_RPMB (1<<3)
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};
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struct mmc_card_error_log {
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char type[MAX_REQ_TYPE_INDEX];
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int err_type;
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u32 status;
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u64 first_issue_time;
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u64 last_issue_time;
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u32 count;
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u32 ge_cnt; // status[19] : general error or unknown error_count
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u32 cc_cnt; // status[20] : internal card controller error_count
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u32 ecc_cnt; // status[21] : ecc error_count
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u32 wp_cnt; // status[26] : write protection error_count
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u32 oor_cnt; // status[31] : out of range error
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u32 noti_cnt; // uevent notification count
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u32 halt_cnt; // cq halt / unhalt fail
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u32 cq_cnt; // cq enable / disable fail
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u32 rpmb_cnt; // RPMB switch fail
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u32 hw_rst_cnt; // reset count
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};
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/*
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* MMC device
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*/
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struct mmc_card {
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struct mmc_host *host; /* the host this device belongs to */
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struct device dev; /* the device */
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u32 ocr; /* the current OCR setting */
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unsigned int rca; /* relative card address of device */
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unsigned int type; /* card type */
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#define MMC_TYPE_MMC 0 /* MMC card */
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#define MMC_TYPE_SD 1 /* SD card */
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#define MMC_TYPE_SDIO 2 /* SDIO card */
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#define MMC_TYPE_SD_COMBO 3 /* SD combo (IO+mem) card */
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unsigned int state; /* (our) card state */
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unsigned int quirks; /* card quirks */
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unsigned int quirk_max_rate; /* max rate set by quirks */
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#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
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#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
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/* for byte mode */
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#define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */
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/* (missing CIA registers) */
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#define MMC_QUIRK_NONSTD_FUNC_IF (1<<4) /* SDIO card has nonstd function interfaces */
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#define MMC_QUIRK_DISABLE_CD (1<<5) /* disconnect CD/DAT[3] resistor */
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#define MMC_QUIRK_INAND_CMD38 (1<<6) /* iNAND devices have broken CMD38 */
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#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */
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#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */
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/* byte mode */
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#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */
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#define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */
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#define MMC_QUIRK_BROKEN_IRQ_POLLING (1<<11) /* Polling SDIO_CCCR_INTx could create a fake interrupt */
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#define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */
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#define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */
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bool reenable_cmdq; /* Re-enable Command Queue */
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unsigned int erase_size; /* erase size in sectors */
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unsigned int erase_shift; /* if erase unit is power 2 */
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unsigned int pref_erase; /* in sectors */
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unsigned int eg_boundary; /* don't cross erase-group boundaries */
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u8 erased_byte; /* value of erased bytes */
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unsigned int wp_grp_size; /* write group size in sectors */
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u32 raw_cid[4]; /* raw card CID */
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u32 raw_csd[4]; /* raw card CSD */
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u32 raw_scr[2]; /* raw card SCR */
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u32 raw_ssr[16]; /* raw card SSR */
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struct mmc_cid cid; /* card identification */
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struct mmc_csd csd; /* card specific */
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struct mmc_ext_csd ext_csd; /* mmc v4 extended card specific */
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struct sd_scr scr; /* extra SD information */
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struct sd_ssr ssr; /* yet more SD information */
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struct sd_switch_caps sw_caps; /* switch (CMD6) caps */
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unsigned int sdio_funcs; /* number of SDIO functions */
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struct sdio_cccr cccr; /* common card info */
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struct sdio_cis cis; /* common tuple info */
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struct sdio_func *sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
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struct sdio_func *sdio_single_irq; /* SDIO function when only one IRQ active */
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unsigned num_info; /* number of info strings */
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const char **info; /* info strings */
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struct sdio_func_tuple *tuples; /* unknown common tuples */
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unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */
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unsigned int mmc_avail_type; /* supported device type by both host and card */
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unsigned int drive_strength; /* for UHS-I, HS200 or HS400 */
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struct dentry *debugfs_root;
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struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
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unsigned int nr_parts;
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#ifdef CONFIG_MTK_EMMC_HW_CQ
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unsigned int part_curr;
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bool cqe_init;
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#endif
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unsigned int bouncesz; /* Bounce buffer size */
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struct workqueue_struct *complete_wq; /* Private workqueue */
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struct mmc_card_error_log err_log[MAX_ERR_LOG_INDEX];
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struct mmc_card_error_log err_log_backup[MAX_ERR_LOG_INDEX];
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};
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static inline bool mmc_large_sector(struct mmc_card *card)
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{
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return card->ext_csd.data_sector_size == 4096;
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}
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bool mmc_card_is_blockaddr(struct mmc_card *card);
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void mmc_card_error_logging(struct mmc_card *card, struct mmc_blk_request *brq, u32 status);
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#define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC)
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#define mmc_card_sd(c) ((c)->type == MMC_TYPE_SD)
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#define mmc_card_sdio(c) ((c)->type == MMC_TYPE_SDIO)
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#endif /* LINUX_MMC_CARD_H */
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