6db4831e98
Android 14
22 lines
629 B
Plaintext
22 lines
629 B
Plaintext
* Amlogic audio memory arbiter controller
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The Amlogic Audio ARB is a simple device which enables or
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disables the access of Audio FIFOs to DDR on AXG based SoC.
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Required properties:
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- compatible: 'amlogic,meson-axg-audio-arb'
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- reg: physical base address of the controller and length of memory
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mapped region.
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- clocks: phandle to the fifo peripheral clock provided by the audio
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clock controller.
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- #reset-cells: must be 1.
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Example on the A113 SoC:
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arb: reset-controller@280 {
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compatible = "amlogic,meson-axg-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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