98 lines
3.6 KiB
Plaintext
98 lines
3.6 KiB
Plaintext
Renesas MSIOF spi controller
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Required properties:
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- compatible : "renesas,msiof-r8a7743" (RZ/G1M)
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"renesas,msiof-r8a7745" (RZ/G1E)
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"renesas,msiof-r8a7790" (R-Car H2)
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"renesas,msiof-r8a7791" (R-Car M2-W)
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"renesas,msiof-r8a7792" (R-Car V2H)
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"renesas,msiof-r8a7793" (R-Car M2-N)
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"renesas,msiof-r8a7794" (R-Car E2)
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"renesas,msiof-r8a7795" (R-Car H3)
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"renesas,msiof-r8a7796" (R-Car M3-W)
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"renesas,msiof-r8a77965" (R-Car M3-N)
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"renesas,msiof-sh73a0" (SH-Mobile AG5)
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"renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
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"renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
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"renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
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"renesas,sh-msiof" (deprecated)
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When compatible with the generic version, nodes
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must list the SoC-specific version corresponding
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to the platform first followed by the generic
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version.
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- reg : A list of offsets and lengths of the register sets for
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the device.
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If only one register set is present, it is to be used
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by both the CPU and the DMA engine.
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If two register sets are present, the first is to be
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used by the CPU, and the second is to be used by the
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DMA engine.
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- interrupts : Interrupt specifier
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- #address-cells : Must be <1>
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- #size-cells : Must be <0>
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Optional properties:
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- clocks : Must contain a reference to the functional clock.
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- num-cs : Total number of chip selects (default is 1).
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Up to 3 native chip selects are supported:
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0: MSIOF_SYNC
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1: MSIOF_SS1
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2: MSIOF_SS2
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Hardware limitations related to chip selects:
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- Native chip selects are always deasserted in
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between transfers that are part of the same
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message. Use cs-gpios to work around this.
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- All slaves using native chip selects must use the
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same spi-cs-high configuration. Use cs-gpios to
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work around this.
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- When using GPIO chip selects, at least one native
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chip select must be left unused, as it will be
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driven anyway.
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- dmas : Must contain a list of two references to DMA
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specifiers, one for transmission, and one for
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reception.
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- dma-names : Must contain a list of two DMA names, "tx" and "rx".
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- spi-slave : Empty property indicating the SPI controller is used
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in slave mode.
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- renesas,dtdl : delay sync signal (setup) in transmit mode.
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Must contain one of the following values:
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0 (no bit delay)
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50 (0.5-clock-cycle delay)
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100 (1-clock-cycle delay)
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150 (1.5-clock-cycle delay)
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200 (2-clock-cycle delay)
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- renesas,syncdl : delay sync signal (hold) in transmit mode.
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Must contain one of the following values:
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0 (no bit delay)
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50 (0.5-clock-cycle delay)
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100 (1-clock-cycle delay)
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150 (1.5-clock-cycle delay)
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200 (2-clock-cycle delay)
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300 (3-clock-cycle delay)
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Optional properties, deprecated for soctype-specific bindings:
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- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
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(default is 64)
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- renesas,rx-fifo-size : Overrides the default rx fifo size given in words
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(default is 64)
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Pinctrl properties might be needed, too. See
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Documentation/devicetree/bindings/pinctrl/renesas,*.
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Example:
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msiof0: spi@e6e20000 {
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compatible = "renesas,msiof-r8a7791",
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"renesas,rcar-gen2-msiof";
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reg = <0 0xe6e20000 0 0x0064>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
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dmas = <&dmac0 0x51>, <&dmac0 0x52>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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