6db4831e98
Android 14
437 lines
9.9 KiB
C
437 lines
9.9 KiB
C
/*
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* arch/arm64/kernel/topology.c
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*
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* Copyright (C) 2011,2013,2014 Linaro Limited.
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*
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* Based on the arm32 version written by Vincent Guittot in turn based on
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* arch/sh/kernel/topology.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/acpi.h>
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#include <linux/arch_topology.h>
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#include <linux/cacheinfo.h>
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/node.h>
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#include <linux/nodemask.h>
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#include <linux/of.h>
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#include <linux/sched.h>
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#include <linux/sched/topology.h>
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#include <linux/slab.h>
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#include <linux/smp.h>
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#include <linux/string.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/topology.h>
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static int __init get_cpu_for_node(struct device_node *node)
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{
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struct device_node *cpu_node;
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int cpu;
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cpu_node = of_parse_phandle(node, "cpu", 0);
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if (!cpu_node)
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return -1;
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cpu = of_cpu_node_to_id(cpu_node);
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if (cpu >= 0)
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topology_parse_cpu_capacity(cpu_node, cpu);
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else
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pr_crit("Unable to find CPU node for %pOF\n", cpu_node);
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of_node_put(cpu_node);
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return cpu;
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}
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static int __init parse_core(struct device_node *core, int package_id,
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int core_id)
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{
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char name[10];
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bool leaf = true;
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int i = 0;
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int cpu;
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struct device_node *t;
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do {
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snprintf(name, sizeof(name), "thread%d", i);
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t = of_get_child_by_name(core, name);
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if (t) {
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leaf = false;
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cpu = get_cpu_for_node(t);
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if (cpu >= 0) {
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cpu_topology[cpu].package_id = package_id;
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cpu_topology[cpu].core_id = core_id;
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cpu_topology[cpu].thread_id = i;
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} else {
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pr_err("%pOF: Can't get CPU for thread\n",
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t);
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of_node_put(t);
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return -EINVAL;
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}
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of_node_put(t);
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}
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i++;
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} while (t);
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cpu = get_cpu_for_node(core);
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if (cpu >= 0) {
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if (!leaf) {
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pr_err("%pOF: Core has both threads and CPU\n",
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core);
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return -EINVAL;
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}
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cpu_topology[cpu].package_id = package_id;
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cpu_topology[cpu].core_id = core_id;
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} else if (leaf) {
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pr_err("%pOF: Can't get CPU for leaf core\n", core);
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return -EINVAL;
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}
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return 0;
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}
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static int __init parse_cluster(struct device_node *cluster, int depth)
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{
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char name[10];
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bool leaf = true;
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bool has_cores = false;
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struct device_node *c;
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static int package_id __initdata;
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int core_id = 0;
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int i, ret;
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/*
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* First check for child clusters; we currently ignore any
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* information about the nesting of clusters and present the
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* scheduler with a flat list of them.
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*/
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i = 0;
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do {
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snprintf(name, sizeof(name), "cluster%d", i);
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c = of_get_child_by_name(cluster, name);
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if (c) {
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leaf = false;
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ret = parse_cluster(c, depth + 1);
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of_node_put(c);
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if (ret != 0)
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return ret;
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}
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i++;
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} while (c);
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/* Now check for cores */
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i = 0;
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do {
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snprintf(name, sizeof(name), "core%d", i);
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c = of_get_child_by_name(cluster, name);
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if (c) {
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has_cores = true;
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if (depth == 0) {
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pr_err("%pOF: cpu-map children should be clusters\n",
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c);
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of_node_put(c);
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return -EINVAL;
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}
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if (leaf) {
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ret = parse_core(c, package_id, core_id++);
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} else {
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pr_err("%pOF: Non-leaf cluster with core %s\n",
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cluster, name);
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ret = -EINVAL;
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}
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of_node_put(c);
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if (ret != 0)
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return ret;
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}
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i++;
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} while (c);
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if (leaf && !has_cores)
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pr_warn("%pOF: empty cluster\n", cluster);
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if (leaf)
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package_id++;
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return 0;
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}
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static int __init parse_dt_topology(void)
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{
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struct device_node *cn, *map;
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int ret = 0;
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int cpu;
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cn = of_find_node_by_path("/cpus");
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if (!cn) {
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pr_err("No CPU information found in DT\n");
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return 0;
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}
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/*
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* When topology is provided cpu-map is essentially a root
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* cluster with restricted subnodes.
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*/
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map = of_get_child_by_name(cn, "cpu-map");
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if (!map)
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goto out;
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ret = parse_cluster(map, 0);
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if (ret != 0)
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goto out_map;
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topology_normalize_cpu_scale();
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/*
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* Check that all cores are in the topology; the SMP code will
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* only mark cores described in the DT as possible.
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*/
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for_each_possible_cpu(cpu)
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if (cpu_topology[cpu].package_id == -1)
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ret = -EINVAL;
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out_map:
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of_node_put(map);
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out:
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of_node_put(cn);
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return ret;
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}
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/*
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* cpu topology table
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*/
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struct cpu_topology cpu_topology[NR_CPUS];
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EXPORT_SYMBOL_GPL(cpu_topology);
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const struct cpumask *cpu_coregroup_mask(int cpu)
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{
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const cpumask_t *core_mask = cpumask_of_node(cpu_to_node(cpu));
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/* Find the smaller of NUMA, core or LLC siblings */
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if (cpumask_subset(&cpu_topology[cpu].core_sibling, core_mask)) {
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/* not numa in package, lets use the package siblings */
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core_mask = &cpu_topology[cpu].core_sibling;
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}
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if (cpu_topology[cpu].llc_id != -1) {
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if (cpumask_subset(&cpu_topology[cpu].llc_sibling, core_mask))
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core_mask = &cpu_topology[cpu].llc_sibling;
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}
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return core_mask;
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}
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static void update_siblings_masks(unsigned int cpuid)
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{
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struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
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int cpu;
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/* update core and thread sibling masks */
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for_each_online_cpu(cpu) {
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cpu_topo = &cpu_topology[cpu];
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if (cpuid_topo->llc_id == cpu_topo->llc_id) {
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cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling);
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cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling);
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}
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if (cpuid_topo->package_id != cpu_topo->package_id)
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continue;
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cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
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cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
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if (cpuid_topo->core_id != cpu_topo->core_id)
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continue;
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cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
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cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
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}
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}
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void store_cpu_topology(unsigned int cpuid)
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{
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struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
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u64 mpidr;
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if (cpuid_topo->package_id != -1)
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goto topology_populated;
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mpidr = read_cpuid_mpidr();
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/* Uniprocessor systems can rely on default topology values */
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if (mpidr & MPIDR_UP_BITMASK)
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return;
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/*
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* This would be the place to create cpu topology based on MPIDR.
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*
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* However, it cannot be trusted to depict the actual topology; some
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* pieces of the architecture enforce an artificial cap on Aff0 values
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* (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
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* artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
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* having absolutely no relationship to the actual underlying system
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* topology, and cannot be reasonably used as core / package ID.
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*
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* If the MT bit is set, Aff0 *could* be used to define a thread ID, but
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* we still wouldn't be able to obtain a sane core ID. This means we
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* need to entirely ignore MPIDR for any topology deduction.
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*/
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = cpuid;
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cpuid_topo->package_id = cpu_to_node(cpuid);
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pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
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cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
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cpuid_topo->thread_id, mpidr);
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topology_populated:
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update_siblings_masks(cpuid);
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}
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static void clear_cpu_topology(int cpu)
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{
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struct cpu_topology *cpu_topo = &cpu_topology[cpu];
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cpumask_clear(&cpu_topo->llc_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->llc_sibling);
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cpumask_clear(&cpu_topo->core_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->core_sibling);
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cpumask_clear(&cpu_topo->thread_sibling);
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cpumask_set_cpu(cpu, &cpu_topo->thread_sibling);
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}
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static void __init reset_cpu_topology(void)
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{
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unsigned int cpu;
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for_each_possible_cpu(cpu) {
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struct cpu_topology *cpu_topo = &cpu_topology[cpu];
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cpu_topo->thread_id = -1;
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cpu_topo->core_id = 0;
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cpu_topo->package_id = -1;
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cpu_topo->llc_id = -1;
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clear_cpu_topology(cpu);
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}
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}
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void remove_cpu_topology(unsigned int cpu)
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{
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int sibling;
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for_each_cpu(sibling, topology_core_cpumask(cpu))
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cpumask_clear_cpu(cpu, topology_core_cpumask(sibling));
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for_each_cpu(sibling, topology_sibling_cpumask(cpu))
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cpumask_clear_cpu(cpu, topology_sibling_cpumask(sibling));
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for_each_cpu(sibling, topology_llc_cpumask(cpu))
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cpumask_clear_cpu(cpu, topology_llc_cpumask(sibling));
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clear_cpu_topology(cpu);
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}
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int topology_nr_clusters(void)
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{
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int cpu;
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int nr_clusters = 0;
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int cluster_id, prev_cluster_id = -1;
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for_each_possible_cpu(cpu) {
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cluster_id = topology_physical_package_id(cpu);
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if (cluster_id != prev_cluster_id) {
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nr_clusters++;
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prev_cluster_id = cluster_id;
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}
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}
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return nr_clusters;
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}
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#ifdef CONFIG_ACPI
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static bool __init acpi_cpu_is_threaded(int cpu)
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{
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int is_threaded = acpi_pptt_cpu_is_thread(cpu);
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/*
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* if the PPTT doesn't have thread information, assume a homogeneous
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* machine and return the current CPU's thread state.
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*/
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if (is_threaded < 0)
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is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
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return !!is_threaded;
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}
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/*
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* Propagate the topology information of the processor_topology_node tree to the
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* cpu_topology array.
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*/
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static int __init parse_acpi_topology(void)
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{
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int cpu, topology_id;
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for_each_possible_cpu(cpu) {
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int i, cache_id;
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topology_id = find_acpi_cpu_topology(cpu, 0);
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if (topology_id < 0)
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return topology_id;
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if (acpi_cpu_is_threaded(cpu)) {
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cpu_topology[cpu].thread_id = topology_id;
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topology_id = find_acpi_cpu_topology(cpu, 1);
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cpu_topology[cpu].core_id = topology_id;
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} else {
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cpu_topology[cpu].thread_id = -1;
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cpu_topology[cpu].core_id = topology_id;
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}
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topology_id = find_acpi_cpu_topology_package(cpu);
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cpu_topology[cpu].package_id = topology_id;
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i = acpi_find_last_cache_level(cpu);
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if (i > 0) {
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/*
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* this is the only part of cpu_topology that has
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* a direct relationship with the cache topology
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*/
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cache_id = find_acpi_cpu_cache_topology(cpu, i);
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if (cache_id > 0)
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cpu_topology[cpu].llc_id = cache_id;
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}
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}
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return 0;
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}
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#else
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static inline int __init parse_acpi_topology(void)
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{
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return -EINVAL;
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}
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#endif
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void __init init_cpu_topology(void)
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{
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reset_cpu_topology();
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/*
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* Discard anything that was parsed if we hit an error so we
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* don't use partial information.
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*/
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if (!acpi_disabled && parse_acpi_topology())
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reset_cpu_topology();
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else if (of_have_populated_dt() && parse_dt_topology())
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reset_cpu_topology();
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}
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