6db4831e98
Android 14
140 lines
3.2 KiB
C
140 lines
3.2 KiB
C
/*
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* arch/sh/boards/mach-x3proto/gpio.c
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*
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* Renesas SH-X3 Prototype Baseboard GPIO Support.
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*
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* Copyright (C) 2010 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/gpio/driver.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/irqdomain.h>
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#include <linux/io.h>
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#include <mach/ilsel.h>
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#include <mach/hardware.h>
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#define KEYCTLR 0xb81c0000
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#define KEYOUTR 0xb81c0002
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#define KEYDETR 0xb81c0004
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static DEFINE_SPINLOCK(x3proto_gpio_lock);
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static struct irq_domain *x3proto_irq_domain;
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static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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unsigned long flags;
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unsigned int data;
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spin_lock_irqsave(&x3proto_gpio_lock, flags);
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data = __raw_readw(KEYCTLR);
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data |= (1 << gpio);
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__raw_writew(data, KEYCTLR);
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spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
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return 0;
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}
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static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
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{
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return !!(__raw_readw(KEYDETR) & (1 << gpio));
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}
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static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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int virq;
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if (gpio < chip->ngpio)
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virq = irq_create_mapping(x3proto_irq_domain, gpio);
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else
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virq = -ENXIO;
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return virq;
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}
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static void x3proto_gpio_irq_handler(struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct irq_chip *chip = irq_data_get_irq_chip(data);
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unsigned long mask;
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int pin;
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chip->irq_mask_ack(data);
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mask = __raw_readw(KEYDETR);
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for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
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generic_handle_irq(irq_linear_revmap(x3proto_irq_domain, pin));
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chip->irq_unmask(data);
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}
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struct gpio_chip x3proto_gpio_chip = {
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.label = "x3proto-gpio",
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.direction_input = x3proto_gpio_direction_input,
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.get = x3proto_gpio_get,
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.to_irq = x3proto_gpio_to_irq,
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.base = -1,
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.ngpio = NR_BASEBOARD_GPIOS,
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};
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static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq)
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{
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irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq,
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"gpio");
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return 0;
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}
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static struct irq_domain_ops x3proto_gpio_irq_ops = {
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.map = x3proto_gpio_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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int __init x3proto_gpio_setup(void)
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{
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int ilsel, ret;
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ilsel = ilsel_enable(ILSEL_KEY);
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if (unlikely(ilsel < 0))
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return ilsel;
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ret = gpiochip_add_data(&x3proto_gpio_chip, NULL);
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if (unlikely(ret))
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goto err_gpio;
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x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
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&x3proto_gpio_irq_ops, NULL);
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if (unlikely(!x3proto_irq_domain))
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goto err_irq;
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pr_info("registering '%s' support, handling GPIOs %u -> %u, "
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"bound to IRQ %u\n",
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x3proto_gpio_chip.label, x3proto_gpio_chip.base,
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x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio,
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ilsel);
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irq_set_chained_handler(ilsel, x3proto_gpio_irq_handler);
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irq_set_irq_wake(ilsel, 1);
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return 0;
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err_irq:
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gpiochip_remove(&x3proto_gpio_chip);
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ret = 0;
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err_gpio:
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synchronize_irq(ilsel);
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ilsel_disable(ILSEL_KEY);
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return ret;
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}
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