200 lines
4.5 KiB
C
200 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SH_UNALIGNED_SH4A_H
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#define __ASM_SH_UNALIGNED_SH4A_H
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/*
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* SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
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* Support for 64-bit accesses are done through shifting and masking
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* relative to the endianness. Unaligned stores are not supported by the
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* instruction encoding, so these continue to use the packed
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* struct.
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*
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* The same note as with the movli.l/movco.l pair applies here, as long
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* as the load is guaranteed to be inlined, nothing else will hook in to
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* r0 and we get the return value for free.
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*
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* NOTE: Due to the fact we require r0 encoding, care should be taken to
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* avoid mixing these heavily with other r0 consumers, such as the atomic
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* ops. Failure to adhere to this can result in the compiler running out
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* of spill registers and blowing up when building at low optimization
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* levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777.
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*/
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#include <linux/unaligned/packed_struct.h>
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#include <linux/types.h>
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#include <asm/byteorder.h>
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static inline u16 sh4a_get_unaligned_cpu16(const u8 *p)
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{
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#ifdef __LITTLE_ENDIAN
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return p[0] | p[1] << 8;
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#else
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return p[0] << 8 | p[1];
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#endif
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}
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static __always_inline u32 sh4a_get_unaligned_cpu32(const u8 *p)
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{
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unsigned long unaligned;
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__asm__ __volatile__ (
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"movua.l @%1, %0\n\t"
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: "=z" (unaligned)
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: "r" (p)
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);
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return unaligned;
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}
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/*
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* Even though movua.l supports auto-increment on the read side, it can
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* only store to r0 due to instruction encoding constraints, so just let
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* the compiler sort it out on its own.
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*/
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static inline u64 sh4a_get_unaligned_cpu64(const u8 *p)
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{
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#ifdef __LITTLE_ENDIAN
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return (u64)sh4a_get_unaligned_cpu32(p + 4) << 32 |
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sh4a_get_unaligned_cpu32(p);
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#else
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return (u64)sh4a_get_unaligned_cpu32(p) << 32 |
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sh4a_get_unaligned_cpu32(p + 4);
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#endif
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}
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static inline u16 get_unaligned_le16(const void *p)
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{
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return le16_to_cpu(sh4a_get_unaligned_cpu16(p));
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}
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static inline u32 get_unaligned_le32(const void *p)
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{
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return le32_to_cpu(sh4a_get_unaligned_cpu32(p));
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}
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static inline u64 get_unaligned_le64(const void *p)
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{
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return le64_to_cpu(sh4a_get_unaligned_cpu64(p));
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}
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static inline u16 get_unaligned_be16(const void *p)
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{
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return be16_to_cpu(sh4a_get_unaligned_cpu16(p));
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}
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static inline u32 get_unaligned_be32(const void *p)
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{
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return be32_to_cpu(sh4a_get_unaligned_cpu32(p));
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}
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static inline u64 get_unaligned_be64(const void *p)
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{
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return be64_to_cpu(sh4a_get_unaligned_cpu64(p));
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}
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static inline void nonnative_put_le16(u16 val, u8 *p)
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{
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*p++ = val;
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*p++ = val >> 8;
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}
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static inline void nonnative_put_le32(u32 val, u8 *p)
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{
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nonnative_put_le16(val, p);
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nonnative_put_le16(val >> 16, p + 2);
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}
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static inline void nonnative_put_le64(u64 val, u8 *p)
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{
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nonnative_put_le32(val, p);
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nonnative_put_le32(val >> 32, p + 4);
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}
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static inline void nonnative_put_be16(u16 val, u8 *p)
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{
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*p++ = val >> 8;
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*p++ = val;
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}
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static inline void nonnative_put_be32(u32 val, u8 *p)
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{
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nonnative_put_be16(val >> 16, p);
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nonnative_put_be16(val, p + 2);
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}
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static inline void nonnative_put_be64(u64 val, u8 *p)
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{
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nonnative_put_be32(val >> 32, p);
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nonnative_put_be32(val, p + 4);
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}
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static inline void put_unaligned_le16(u16 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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__put_unaligned_cpu16(val, p);
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#else
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nonnative_put_le16(val, p);
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#endif
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}
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static inline void put_unaligned_le32(u32 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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__put_unaligned_cpu32(val, p);
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#else
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nonnative_put_le32(val, p);
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#endif
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}
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static inline void put_unaligned_le64(u64 val, void *p)
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{
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#ifdef __LITTLE_ENDIAN
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__put_unaligned_cpu64(val, p);
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#else
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nonnative_put_le64(val, p);
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#endif
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}
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static inline void put_unaligned_be16(u16 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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__put_unaligned_cpu16(val, p);
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#else
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nonnative_put_be16(val, p);
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#endif
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}
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static inline void put_unaligned_be32(u32 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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__put_unaligned_cpu32(val, p);
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#else
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nonnative_put_be32(val, p);
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#endif
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}
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static inline void put_unaligned_be64(u64 val, void *p)
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{
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#ifdef __BIG_ENDIAN
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__put_unaligned_cpu64(val, p);
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#else
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nonnative_put_be64(val, p);
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#endif
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}
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/*
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* While it's a bit non-obvious, even though the generic le/be wrappers
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* use the __get/put_xxx prefixing, they actually wrap in to the
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* non-prefixed get/put_xxx variants as provided above.
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*/
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#include <linux/unaligned/generic.h>
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#ifdef __LITTLE_ENDIAN
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# define get_unaligned __get_unaligned_le
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# define put_unaligned __put_unaligned_le
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#else
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# define get_unaligned __get_unaligned_be
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# define put_unaligned __put_unaligned_be
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#endif
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#endif /* __ASM_SH_UNALIGNED_SH4A_H */
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