6db4831e98
Android 14
1252 lines
30 KiB
C
1252 lines
30 KiB
C
/*
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* ni6510 (am7990 'lance' chip) driver for Linux-net-3
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* BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
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* copyrights (c) 1994,1995,1996 by M.Hipp
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*
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* This driver can handle the old ni6510 board and the newer ni6510
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* EtherBlaster. (probably it also works with every full NE2100
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* compatible card)
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*
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* driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
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*
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* This is an extension to the Linux operating system, and is covered by the
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* same GNU General Public License that covers the Linux-kernel.
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*
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* comments/bugs/suggestions can be sent to:
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* Michael Hipp
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* email: hippm@informatik.uni-tuebingen.de
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*
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* sources:
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* some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
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* and from the original drivers by D.Becker
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*
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* known problems:
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* - on some PCI boards (including my own) the card/board/ISA-bridge has
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* problems with bus master DMA. This results in lotsa overruns.
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* It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
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* the XMT and RCV_VIA_SKB option .. this reduces driver performance.
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* Or just play with your BIOS options to optimize ISA-DMA access.
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* Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
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* defines -> please report me your experience then
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* - Harald reported for ASUS SP3G mainboards, that you should use
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* the 'optimal settings' from the user's manual on page 3-12!
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*
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* credits:
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* thanx to Jason Sullivan for sending me a ni6510 card!
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* lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
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*
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* simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
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* average: FTP -> 8384421 bytes received in 8.5 seconds
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* (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
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* peak: FTP -> 8384421 bytes received in 7.5 seconds
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* (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
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*/
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/*
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* 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
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* 96.Sept.29: virt_to_bus stuff added for new memory modell
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* 96.April.29: Added Harald Koenig's Patches (MH)
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* 96.April.13: enhanced error handling .. more tests (MH)
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* 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
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* 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
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* 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
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* hopefully no more 16MB limit
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*
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* 95.Nov.18: multicast tweaked (AC).
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*
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* 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
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*
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* 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/module.h>
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#include <linux/bitops.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include "ni65.h"
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/*
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* the current setting allows an acceptable performance
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* for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
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* the header of this file
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* 'invert' the defines for max. performance. This may cause DMA problems
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* on some boards (e.g on my ASUS SP3G)
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*/
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#undef XMT_VIA_SKB
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#undef RCV_VIA_SKB
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#define RCV_PARANOIA_CHECK
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#define MID_PERFORMANCE
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#if defined( LOW_PERFORMANCE )
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static int isa0=7,isa1=7,csr80=0x0c10;
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#elif defined( MID_PERFORMANCE )
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static int isa0=5,isa1=5,csr80=0x2810;
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#else /* high performance */
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static int isa0=4,isa1=4,csr80=0x0017;
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#endif
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/*
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* a few card/vendor specific defines
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*/
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#define NI65_ID0 0x00
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#define NI65_ID1 0x55
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#define NI65_EB_ID0 0x52
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#define NI65_EB_ID1 0x44
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#define NE2100_ID0 0x57
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#define NE2100_ID1 0x57
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#define PORT p->cmdr_addr
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/*
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* buffer configuration
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*/
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#if 1
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#define RMDNUM 16
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#define RMDNUMMASK 0x80000000
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#else
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#define RMDNUM 8
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#define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
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#endif
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#if 0
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#define TMDNUM 1
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#define TMDNUMMASK 0x00000000
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#else
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#define TMDNUM 4
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#define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
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#endif
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/* slightly oversized */
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#define R_BUF_SIZE 1544
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#define T_BUF_SIZE 1544
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/*
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* lance register defines
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*/
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#define L_DATAREG 0x00
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#define L_ADDRREG 0x02
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#define L_RESET 0x04
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#define L_CONFIG 0x05
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#define L_BUSIF 0x06
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/*
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* to access the lance/am7990-regs, you have to write
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* reg-number into L_ADDRREG, then you can access it using L_DATAREG
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*/
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#define CSR0 0x00
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#define CSR1 0x01
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#define CSR2 0x02
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#define CSR3 0x03
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#define INIT_RING_BEFORE_START 0x1
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#define FULL_RESET_ON_ERROR 0x2
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#if 0
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#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
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outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
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#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
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inw(PORT+L_DATAREG))
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#if 0
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#define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
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#else
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#define writedatareg(val) { writereg(val,CSR0); }
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#endif
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#else
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#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
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#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
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#define writedatareg(val) { writereg(val,CSR0); }
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#endif
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static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
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static struct card {
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unsigned char id0,id1;
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short id_offset;
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short total_size;
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short cmd_offset;
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short addr_offset;
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unsigned char *vendor_id;
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char *cardname;
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unsigned long config;
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} cards[] = {
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{
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.id0 = NI65_ID0,
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.id1 = NI65_ID1,
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.id_offset = 0x0e,
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.total_size = 0x10,
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.cmd_offset = 0x0,
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.addr_offset = 0x8,
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.vendor_id = ni_vendor,
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.cardname = "ni6510",
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.config = 0x1,
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},
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{
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.id0 = NI65_EB_ID0,
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.id1 = NI65_EB_ID1,
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.id_offset = 0x0e,
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.total_size = 0x18,
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.cmd_offset = 0x10,
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.addr_offset = 0x0,
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.vendor_id = ni_vendor,
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.cardname = "ni6510 EtherBlaster",
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.config = 0x2,
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},
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{
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.id0 = NE2100_ID0,
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.id1 = NE2100_ID1,
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.id_offset = 0x0e,
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.total_size = 0x18,
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.cmd_offset = 0x10,
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.addr_offset = 0x0,
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.vendor_id = NULL,
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.cardname = "generic NE2100",
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.config = 0x0,
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},
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};
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#define NUM_CARDS 3
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struct priv
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{
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struct rmd rmdhead[RMDNUM];
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struct tmd tmdhead[TMDNUM];
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struct init_block ib;
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int rmdnum;
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int tmdnum,tmdlast;
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#ifdef RCV_VIA_SKB
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struct sk_buff *recv_skb[RMDNUM];
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#else
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void *recvbounce[RMDNUM];
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#endif
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#ifdef XMT_VIA_SKB
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struct sk_buff *tmd_skb[TMDNUM];
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#endif
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void *tmdbounce[TMDNUM];
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int tmdbouncenum;
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int lock,xmit_queued;
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void *self;
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int cmdr_addr;
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int cardno;
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int features;
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spinlock_t ring_lock;
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};
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static int ni65_probe1(struct net_device *dev,int);
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static irqreturn_t ni65_interrupt(int irq, void * dev_id);
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static void ni65_recv_intr(struct net_device *dev,int);
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static void ni65_xmit_intr(struct net_device *dev,int);
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static int ni65_open(struct net_device *dev);
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static int ni65_lance_reinit(struct net_device *dev);
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static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
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static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
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struct net_device *dev);
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static void ni65_timeout(struct net_device *dev);
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static int ni65_close(struct net_device *dev);
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static int ni65_alloc_buffer(struct net_device *dev);
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static void ni65_free_buffer(struct priv *p);
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static void set_multicast_list(struct net_device *dev);
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static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
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static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
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static int debuglevel = 1;
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/*
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* set 'performance' registers .. we must STOP lance for that
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*/
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static void ni65_set_performance(struct priv *p)
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{
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writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
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if( !(cards[p->cardno].config & 0x02) )
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return;
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outw(80,PORT+L_ADDRREG);
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if(inw(PORT+L_ADDRREG) != 80)
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return;
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writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
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outw(0,PORT+L_ADDRREG);
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outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
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outw(1,PORT+L_ADDRREG);
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outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
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outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
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}
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/*
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* open interface (up)
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*/
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static int ni65_open(struct net_device *dev)
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{
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struct priv *p = dev->ml_priv;
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int irqval = request_irq(dev->irq, ni65_interrupt,0,
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cards[p->cardno].cardname,dev);
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if (irqval) {
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printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
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dev->name,dev->irq, irqval);
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return -EAGAIN;
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}
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if(ni65_lance_reinit(dev))
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{
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netif_start_queue(dev);
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return 0;
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}
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else
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{
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free_irq(dev->irq,dev);
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return -EAGAIN;
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}
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}
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/*
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* close interface (down)
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*/
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static int ni65_close(struct net_device *dev)
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{
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struct priv *p = dev->ml_priv;
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netif_stop_queue(dev);
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outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
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#ifdef XMT_VIA_SKB
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{
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int i;
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for(i=0;i<TMDNUM;i++)
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{
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if(p->tmd_skb[i]) {
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dev_kfree_skb(p->tmd_skb[i]);
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p->tmd_skb[i] = NULL;
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}
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}
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}
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#endif
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free_irq(dev->irq,dev);
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return 0;
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}
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static void cleanup_card(struct net_device *dev)
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{
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struct priv *p = dev->ml_priv;
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disable_dma(dev->dma);
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free_dma(dev->dma);
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release_region(dev->base_addr, cards[p->cardno].total_size);
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ni65_free_buffer(p);
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}
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/* set: io,irq,dma or set it when calling insmod */
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static int irq;
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static int io;
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static int dma;
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/*
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* Probe The Card (not the lance-chip)
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*/
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struct net_device * __init ni65_probe(int unit)
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{
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struct net_device *dev = alloc_etherdev(0);
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static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };
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const int *port;
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int err = 0;
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if (!dev)
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return ERR_PTR(-ENOMEM);
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if (unit >= 0) {
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sprintf(dev->name, "eth%d", unit);
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netdev_boot_setup_check(dev);
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irq = dev->irq;
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dma = dev->dma;
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} else {
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dev->base_addr = io;
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}
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if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
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err = ni65_probe1(dev, dev->base_addr);
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} else if (dev->base_addr > 0) { /* Don't probe at all. */
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err = -ENXIO;
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} else {
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for (port = ports; *port && ni65_probe1(dev, *port); port++)
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;
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if (!*port)
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err = -ENODEV;
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}
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if (err)
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goto out;
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err = register_netdev(dev);
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if (err)
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goto out1;
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return dev;
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out1:
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cleanup_card(dev);
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out:
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free_netdev(dev);
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return ERR_PTR(err);
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}
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static const struct net_device_ops ni65_netdev_ops = {
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.ndo_open = ni65_open,
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.ndo_stop = ni65_close,
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.ndo_start_xmit = ni65_send_packet,
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.ndo_tx_timeout = ni65_timeout,
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.ndo_set_rx_mode = set_multicast_list,
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.ndo_set_mac_address = eth_mac_addr,
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.ndo_validate_addr = eth_validate_addr,
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};
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/*
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* this is the real card probe ..
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*/
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static int __init ni65_probe1(struct net_device *dev,int ioaddr)
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{
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int i,j;
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struct priv *p;
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unsigned long flags;
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|
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dev->irq = irq;
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dev->dma = dma;
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for(i=0;i<NUM_CARDS;i++) {
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if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
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continue;
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if(cards[i].id_offset >= 0) {
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if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
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inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
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release_region(ioaddr, cards[i].total_size);
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continue;
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}
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}
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if(cards[i].vendor_id) {
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for(j=0;j<3;j++)
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if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
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release_region(ioaddr, cards[i].total_size);
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continue;
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}
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}
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break;
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}
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if(i == NUM_CARDS)
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return -ENODEV;
|
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|
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for(j=0;j<6;j++)
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dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
|
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|
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if( (j=ni65_alloc_buffer(dev)) < 0) {
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release_region(ioaddr, cards[i].total_size);
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return j;
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}
|
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p = dev->ml_priv;
|
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p->cmdr_addr = ioaddr + cards[i].cmd_offset;
|
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p->cardno = i;
|
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spin_lock_init(&p->ring_lock);
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|
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printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
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|
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outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
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if( (j=readreg(CSR0)) != 0x4) {
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printk("failed.\n");
|
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printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
|
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ni65_free_buffer(p);
|
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release_region(ioaddr, cards[p->cardno].total_size);
|
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return -EAGAIN;
|
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}
|
|
|
|
outw(88,PORT+L_ADDRREG);
|
|
if(inw(PORT+L_ADDRREG) == 88) {
|
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unsigned long v;
|
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v = inw(PORT+L_DATAREG);
|
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v <<= 16;
|
|
outw(89,PORT+L_ADDRREG);
|
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v |= inw(PORT+L_DATAREG);
|
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printk("Version %#08lx, ",v);
|
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p->features = INIT_RING_BEFORE_START;
|
|
}
|
|
else {
|
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printk("ancient LANCE, ");
|
|
p->features = 0x0;
|
|
}
|
|
|
|
if(test_bit(0,&cards[i].config)) {
|
|
dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
|
|
dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
|
|
printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
|
|
}
|
|
else {
|
|
if(dev->dma == 0) {
|
|
/* 'stuck test' from lance.c */
|
|
unsigned long dma_channels =
|
|
((inb(DMA1_STAT_REG) >> 4) & 0x0f)
|
|
| (inb(DMA2_STAT_REG) & 0xf0);
|
|
for(i=1;i<5;i++) {
|
|
int dma = dmatab[i];
|
|
if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
|
|
continue;
|
|
|
|
flags=claim_dma_lock();
|
|
disable_dma(dma);
|
|
set_dma_mode(dma,DMA_MODE_CASCADE);
|
|
enable_dma(dma);
|
|
release_dma_lock(flags);
|
|
|
|
ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
|
|
|
|
flags=claim_dma_lock();
|
|
disable_dma(dma);
|
|
free_dma(dma);
|
|
release_dma_lock(flags);
|
|
|
|
if(readreg(CSR0) & CSR0_IDON)
|
|
break;
|
|
}
|
|
if(i == 5) {
|
|
printk("failed.\n");
|
|
printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
|
|
ni65_free_buffer(p);
|
|
release_region(ioaddr, cards[p->cardno].total_size);
|
|
return -EAGAIN;
|
|
}
|
|
dev->dma = dmatab[i];
|
|
printk("DMA %d (autodetected), ",dev->dma);
|
|
}
|
|
else
|
|
printk("DMA %d (assigned), ",dev->dma);
|
|
|
|
if(dev->irq < 2)
|
|
{
|
|
unsigned long irq_mask;
|
|
|
|
ni65_init_lance(p,dev->dev_addr,0,0);
|
|
irq_mask = probe_irq_on();
|
|
writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
|
|
msleep(20);
|
|
dev->irq = probe_irq_off(irq_mask);
|
|
if(!dev->irq)
|
|
{
|
|
printk("Failed to detect IRQ line!\n");
|
|
ni65_free_buffer(p);
|
|
release_region(ioaddr, cards[p->cardno].total_size);
|
|
return -EAGAIN;
|
|
}
|
|
printk("IRQ %d (autodetected).\n",dev->irq);
|
|
}
|
|
else
|
|
printk("IRQ %d (assigned).\n",dev->irq);
|
|
}
|
|
|
|
if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
|
|
{
|
|
printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
|
|
ni65_free_buffer(p);
|
|
release_region(ioaddr, cards[p->cardno].total_size);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
dev->base_addr = ioaddr;
|
|
dev->netdev_ops = &ni65_netdev_ops;
|
|
dev->watchdog_timeo = HZ/2;
|
|
|
|
return 0; /* everything is OK */
|
|
}
|
|
|
|
/*
|
|
* set lance register and trigger init
|
|
*/
|
|
static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
|
|
{
|
|
int i;
|
|
u32 pib;
|
|
|
|
writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
|
|
|
|
for(i=0;i<6;i++)
|
|
p->ib.eaddr[i] = daddr[i];
|
|
|
|
for(i=0;i<8;i++)
|
|
p->ib.filter[i] = filter;
|
|
p->ib.mode = mode;
|
|
|
|
p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
|
|
p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
|
|
writereg(0,CSR3); /* busmaster/no word-swap */
|
|
pib = (u32) isa_virt_to_bus(&p->ib);
|
|
writereg(pib & 0xffff,CSR1);
|
|
writereg(pib >> 16,CSR2);
|
|
|
|
writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
|
|
|
|
for(i=0;i<32;i++)
|
|
{
|
|
mdelay(4);
|
|
if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
|
|
break; /* init ok ? */
|
|
}
|
|
}
|
|
|
|
/*
|
|
* allocate memory area and check the 16MB border
|
|
*/
|
|
static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
|
|
{
|
|
struct sk_buff *skb=NULL;
|
|
unsigned char *ptr;
|
|
void *ret;
|
|
|
|
if(type) {
|
|
ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
|
|
if(!skb) {
|
|
printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
|
|
return NULL;
|
|
}
|
|
skb_reserve(skb,2+16);
|
|
skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
|
|
ptr = skb->data;
|
|
}
|
|
else {
|
|
ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
|
|
if(!ret)
|
|
return NULL;
|
|
}
|
|
if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
|
|
printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
|
|
if(type)
|
|
kfree_skb(skb);
|
|
else
|
|
kfree(ptr);
|
|
return NULL;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* allocate all memory structures .. send/recv buffers etc ...
|
|
*/
|
|
static int ni65_alloc_buffer(struct net_device *dev)
|
|
{
|
|
unsigned char *ptr;
|
|
struct priv *p;
|
|
int i;
|
|
|
|
/*
|
|
* we need 8-aligned memory ..
|
|
*/
|
|
ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
|
|
if(!ptr)
|
|
return -ENOMEM;
|
|
|
|
p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
|
|
memset((char *)p, 0, sizeof(struct priv));
|
|
p->self = ptr;
|
|
|
|
for(i=0;i<TMDNUM;i++)
|
|
{
|
|
#ifdef XMT_VIA_SKB
|
|
p->tmd_skb[i] = NULL;
|
|
#endif
|
|
p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
|
|
if(!p->tmdbounce[i]) {
|
|
ni65_free_buffer(p);
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
for(i=0;i<RMDNUM;i++)
|
|
{
|
|
#ifdef RCV_VIA_SKB
|
|
p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
|
|
if(!p->recv_skb[i]) {
|
|
ni65_free_buffer(p);
|
|
return -ENOMEM;
|
|
}
|
|
#else
|
|
p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
|
|
if(!p->recvbounce[i]) {
|
|
ni65_free_buffer(p);
|
|
return -ENOMEM;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
return 0; /* everything is OK */
|
|
}
|
|
|
|
/*
|
|
* free buffers and private struct
|
|
*/
|
|
static void ni65_free_buffer(struct priv *p)
|
|
{
|
|
int i;
|
|
|
|
if(!p)
|
|
return;
|
|
|
|
for(i=0;i<TMDNUM;i++) {
|
|
kfree(p->tmdbounce[i]);
|
|
#ifdef XMT_VIA_SKB
|
|
if(p->tmd_skb[i])
|
|
dev_kfree_skb(p->tmd_skb[i]);
|
|
#endif
|
|
}
|
|
|
|
for(i=0;i<RMDNUM;i++)
|
|
{
|
|
#ifdef RCV_VIA_SKB
|
|
if(p->recv_skb[i])
|
|
dev_kfree_skb(p->recv_skb[i]);
|
|
#else
|
|
kfree(p->recvbounce[i]);
|
|
#endif
|
|
}
|
|
kfree(p->self);
|
|
}
|
|
|
|
|
|
/*
|
|
* stop and (re)start lance .. e.g after an error
|
|
*/
|
|
static void ni65_stop_start(struct net_device *dev,struct priv *p)
|
|
{
|
|
int csr0 = CSR0_INEA;
|
|
|
|
writedatareg(CSR0_STOP);
|
|
|
|
if(debuglevel > 1)
|
|
printk(KERN_DEBUG "ni65_stop_start\n");
|
|
|
|
if(p->features & INIT_RING_BEFORE_START) {
|
|
int i;
|
|
#ifdef XMT_VIA_SKB
|
|
struct sk_buff *skb_save[TMDNUM];
|
|
#endif
|
|
unsigned long buffer[TMDNUM];
|
|
short blen[TMDNUM];
|
|
|
|
if(p->xmit_queued) {
|
|
while(1) {
|
|
if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
|
|
break;
|
|
p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
|
|
if(p->tmdlast == p->tmdnum)
|
|
break;
|
|
}
|
|
}
|
|
|
|
for(i=0;i<TMDNUM;i++) {
|
|
struct tmd *tmdp = p->tmdhead + i;
|
|
#ifdef XMT_VIA_SKB
|
|
skb_save[i] = p->tmd_skb[i];
|
|
#endif
|
|
buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
|
|
blen[i] = tmdp->blen;
|
|
tmdp->u.s.status = 0x0;
|
|
}
|
|
|
|
for(i=0;i<RMDNUM;i++) {
|
|
struct rmd *rmdp = p->rmdhead + i;
|
|
rmdp->u.s.status = RCV_OWN;
|
|
}
|
|
p->tmdnum = p->xmit_queued = 0;
|
|
writedatareg(CSR0_STRT | csr0);
|
|
|
|
for(i=0;i<TMDNUM;i++) {
|
|
int num = (i + p->tmdlast) & (TMDNUM-1);
|
|
p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
|
|
p->tmdhead[i].blen = blen[num];
|
|
if(p->tmdhead[i].u.s.status & XMIT_OWN) {
|
|
p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
|
|
p->xmit_queued = 1;
|
|
writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
|
|
}
|
|
#ifdef XMT_VIA_SKB
|
|
p->tmd_skb[i] = skb_save[num];
|
|
#endif
|
|
}
|
|
p->rmdnum = p->tmdlast = 0;
|
|
if(!p->lock)
|
|
if (p->tmdnum || !p->xmit_queued)
|
|
netif_wake_queue(dev);
|
|
netif_trans_update(dev); /* prevent tx timeout */
|
|
}
|
|
else
|
|
writedatareg(CSR0_STRT | csr0);
|
|
}
|
|
|
|
/*
|
|
* init lance (write init-values .. init-buffers) (open-helper)
|
|
*/
|
|
static int ni65_lance_reinit(struct net_device *dev)
|
|
{
|
|
int i;
|
|
struct priv *p = dev->ml_priv;
|
|
unsigned long flags;
|
|
|
|
p->lock = 0;
|
|
p->xmit_queued = 0;
|
|
|
|
flags=claim_dma_lock();
|
|
disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
|
|
set_dma_mode(dev->dma,DMA_MODE_CASCADE);
|
|
enable_dma(dev->dma);
|
|
release_dma_lock(flags);
|
|
|
|
outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
|
|
if( (i=readreg(CSR0) ) != 0x4)
|
|
{
|
|
printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
|
|
cards[p->cardno].cardname,(int) i);
|
|
flags=claim_dma_lock();
|
|
disable_dma(dev->dma);
|
|
release_dma_lock(flags);
|
|
return 0;
|
|
}
|
|
|
|
p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
|
|
for(i=0;i<TMDNUM;i++)
|
|
{
|
|
struct tmd *tmdp = p->tmdhead + i;
|
|
#ifdef XMT_VIA_SKB
|
|
if(p->tmd_skb[i]) {
|
|
dev_kfree_skb(p->tmd_skb[i]);
|
|
p->tmd_skb[i] = NULL;
|
|
}
|
|
#endif
|
|
tmdp->u.buffer = 0x0;
|
|
tmdp->u.s.status = XMIT_START | XMIT_END;
|
|
tmdp->blen = tmdp->status2 = 0;
|
|
}
|
|
|
|
for(i=0;i<RMDNUM;i++)
|
|
{
|
|
struct rmd *rmdp = p->rmdhead + i;
|
|
#ifdef RCV_VIA_SKB
|
|
rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
|
|
#else
|
|
rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
|
|
#endif
|
|
rmdp->blen = -(R_BUF_SIZE-8);
|
|
rmdp->mlen = 0;
|
|
rmdp->u.s.status = RCV_OWN;
|
|
}
|
|
|
|
if(dev->flags & IFF_PROMISC)
|
|
ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
|
|
else if (netdev_mc_count(dev) || dev->flags & IFF_ALLMULTI)
|
|
ni65_init_lance(p,dev->dev_addr,0xff,0x0);
|
|
else
|
|
ni65_init_lance(p,dev->dev_addr,0x00,0x00);
|
|
|
|
/*
|
|
* ni65_set_lance_mem() sets L_ADDRREG to CSR0
|
|
* NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
|
|
*/
|
|
|
|
if(inw(PORT+L_DATAREG) & CSR0_IDON) {
|
|
ni65_set_performance(p);
|
|
/* init OK: start lance , enable interrupts */
|
|
writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
|
|
return 1; /* ->OK */
|
|
}
|
|
printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
|
|
flags=claim_dma_lock();
|
|
disable_dma(dev->dma);
|
|
release_dma_lock(flags);
|
|
return 0; /* ->Error */
|
|
}
|
|
|
|
/*
|
|
* interrupt handler
|
|
*/
|
|
static irqreturn_t ni65_interrupt(int irq, void * dev_id)
|
|
{
|
|
int csr0 = 0;
|
|
struct net_device *dev = dev_id;
|
|
struct priv *p;
|
|
int bcnt = 32;
|
|
|
|
p = dev->ml_priv;
|
|
|
|
spin_lock(&p->ring_lock);
|
|
|
|
while(--bcnt) {
|
|
csr0 = inw(PORT+L_DATAREG);
|
|
|
|
#if 0
|
|
writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
|
|
#else
|
|
writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
|
|
#endif
|
|
|
|
if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
|
|
break;
|
|
|
|
if(csr0 & CSR0_RINT) /* RECV-int? */
|
|
ni65_recv_intr(dev,csr0);
|
|
if(csr0 & CSR0_TINT) /* XMIT-int? */
|
|
ni65_xmit_intr(dev,csr0);
|
|
|
|
if(csr0 & CSR0_ERR)
|
|
{
|
|
if(debuglevel > 1)
|
|
printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
|
|
if(csr0 & CSR0_BABL)
|
|
dev->stats.tx_errors++;
|
|
if(csr0 & CSR0_MISS) {
|
|
int i;
|
|
for(i=0;i<RMDNUM;i++)
|
|
printk("%02x ",p->rmdhead[i].u.s.status);
|
|
printk("\n");
|
|
dev->stats.rx_errors++;
|
|
}
|
|
if(csr0 & CSR0_MERR) {
|
|
if(debuglevel > 1)
|
|
printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
|
|
ni65_stop_start(dev,p);
|
|
}
|
|
}
|
|
}
|
|
|
|
#ifdef RCV_PARANOIA_CHECK
|
|
{
|
|
int j;
|
|
for(j=0;j<RMDNUM;j++)
|
|
{
|
|
int i, num2;
|
|
for(i=RMDNUM-1;i>0;i--) {
|
|
num2 = (p->rmdnum + i) & (RMDNUM-1);
|
|
if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
|
|
break;
|
|
}
|
|
|
|
if(i) {
|
|
int k, num1;
|
|
for(k=0;k<RMDNUM;k++) {
|
|
num1 = (p->rmdnum + k) & (RMDNUM-1);
|
|
if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
|
|
break;
|
|
}
|
|
if(!k)
|
|
break;
|
|
|
|
if(debuglevel > 0)
|
|
{
|
|
char buf[256],*buf1;
|
|
buf1 = buf;
|
|
for(k=0;k<RMDNUM;k++) {
|
|
sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
|
|
buf1 += 3;
|
|
}
|
|
*buf1 = 0;
|
|
printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
|
|
}
|
|
|
|
p->rmdnum = num1;
|
|
ni65_recv_intr(dev,csr0);
|
|
if((p->rmdhead[num2].u.s.status & RCV_OWN))
|
|
break; /* ok, we are 'in sync' again */
|
|
}
|
|
else
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
|
|
printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
|
|
ni65_stop_start(dev,p);
|
|
}
|
|
else
|
|
writedatareg(CSR0_INEA);
|
|
|
|
spin_unlock(&p->ring_lock);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*
|
|
* We have received an Xmit-Interrupt ..
|
|
* send a new packet if necessary
|
|
*/
|
|
static void ni65_xmit_intr(struct net_device *dev,int csr0)
|
|
{
|
|
struct priv *p = dev->ml_priv;
|
|
|
|
while(p->xmit_queued)
|
|
{
|
|
struct tmd *tmdp = p->tmdhead + p->tmdlast;
|
|
int tmdstat = tmdp->u.s.status;
|
|
|
|
if(tmdstat & XMIT_OWN)
|
|
break;
|
|
|
|
if(tmdstat & XMIT_ERR)
|
|
{
|
|
#if 0
|
|
if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
|
|
printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
|
|
#endif
|
|
/* checking some errors */
|
|
if(tmdp->status2 & XMIT_RTRY)
|
|
dev->stats.tx_aborted_errors++;
|
|
if(tmdp->status2 & XMIT_LCAR)
|
|
dev->stats.tx_carrier_errors++;
|
|
if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
|
|
/* this stops the xmitter */
|
|
dev->stats.tx_fifo_errors++;
|
|
if(debuglevel > 0)
|
|
printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
|
|
if(p->features & INIT_RING_BEFORE_START) {
|
|
tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
|
|
ni65_stop_start(dev,p);
|
|
break; /* no more Xmit processing .. */
|
|
}
|
|
else
|
|
ni65_stop_start(dev,p);
|
|
}
|
|
if(debuglevel > 2)
|
|
printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
|
|
if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
|
|
dev->stats.tx_errors++;
|
|
tmdp->status2 = 0;
|
|
}
|
|
else {
|
|
dev->stats.tx_bytes -= (short)(tmdp->blen);
|
|
dev->stats.tx_packets++;
|
|
}
|
|
|
|
#ifdef XMT_VIA_SKB
|
|
if(p->tmd_skb[p->tmdlast]) {
|
|
dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
|
|
p->tmd_skb[p->tmdlast] = NULL;
|
|
}
|
|
#endif
|
|
|
|
p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
|
|
if(p->tmdlast == p->tmdnum)
|
|
p->xmit_queued = 0;
|
|
}
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
/*
|
|
* We have received a packet
|
|
*/
|
|
static void ni65_recv_intr(struct net_device *dev,int csr0)
|
|
{
|
|
struct rmd *rmdp;
|
|
int rmdstat,len;
|
|
int cnt=0;
|
|
struct priv *p = dev->ml_priv;
|
|
|
|
rmdp = p->rmdhead + p->rmdnum;
|
|
while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
|
|
{
|
|
cnt++;
|
|
if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
|
|
{
|
|
if(!(rmdstat & RCV_ERR)) {
|
|
if(rmdstat & RCV_START)
|
|
{
|
|
dev->stats.rx_length_errors++;
|
|
printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
|
|
}
|
|
}
|
|
else {
|
|
if(debuglevel > 2)
|
|
printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
|
|
dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
|
|
if(rmdstat & RCV_FRAM)
|
|
dev->stats.rx_frame_errors++;
|
|
if(rmdstat & RCV_OFLO)
|
|
dev->stats.rx_over_errors++;
|
|
if(rmdstat & RCV_CRC)
|
|
dev->stats.rx_crc_errors++;
|
|
if(rmdstat & RCV_BUF_ERR)
|
|
dev->stats.rx_fifo_errors++;
|
|
}
|
|
if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
|
|
dev->stats.rx_errors++;
|
|
}
|
|
else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
|
|
{
|
|
#ifdef RCV_VIA_SKB
|
|
struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
|
|
if (skb)
|
|
skb_reserve(skb,16);
|
|
#else
|
|
struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
|
|
#endif
|
|
if(skb)
|
|
{
|
|
skb_reserve(skb,2);
|
|
#ifdef RCV_VIA_SKB
|
|
if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
|
|
skb_put(skb,len);
|
|
skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
|
|
}
|
|
else {
|
|
struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
|
|
skb_put(skb,R_BUF_SIZE);
|
|
p->recv_skb[p->rmdnum] = skb;
|
|
rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
|
|
skb = skb1;
|
|
skb_trim(skb,len);
|
|
}
|
|
#else
|
|
skb_put(skb,len);
|
|
skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
|
|
#endif
|
|
dev->stats.rx_packets++;
|
|
dev->stats.rx_bytes += len;
|
|
skb->protocol=eth_type_trans(skb,dev);
|
|
netif_rx(skb);
|
|
}
|
|
else
|
|
{
|
|
printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
|
|
dev->stats.rx_dropped++;
|
|
}
|
|
}
|
|
else {
|
|
printk(KERN_INFO "%s: received runt packet\n",dev->name);
|
|
dev->stats.rx_errors++;
|
|
}
|
|
rmdp->blen = -(R_BUF_SIZE-8);
|
|
rmdp->mlen = 0;
|
|
rmdp->u.s.status = RCV_OWN; /* change owner */
|
|
p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
|
|
rmdp = p->rmdhead + p->rmdnum;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* kick xmitter ..
|
|
*/
|
|
|
|
static void ni65_timeout(struct net_device *dev)
|
|
{
|
|
int i;
|
|
struct priv *p = dev->ml_priv;
|
|
|
|
printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
|
|
for(i=0;i<TMDNUM;i++)
|
|
printk("%02x ",p->tmdhead[i].u.s.status);
|
|
printk("\n");
|
|
ni65_lance_reinit(dev);
|
|
netif_trans_update(dev); /* prevent tx timeout */
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
/*
|
|
* Send a packet
|
|
*/
|
|
|
|
static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
|
|
struct net_device *dev)
|
|
{
|
|
struct priv *p = dev->ml_priv;
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
if (test_and_set_bit(0, (void*)&p->lock)) {
|
|
printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
{
|
|
short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
|
|
struct tmd *tmdp;
|
|
unsigned long flags;
|
|
|
|
#ifdef XMT_VIA_SKB
|
|
if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
|
|
#endif
|
|
|
|
skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
|
|
skb->len > T_BUF_SIZE ? T_BUF_SIZE :
|
|
skb->len);
|
|
if (len > skb->len)
|
|
memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
|
|
dev_kfree_skb (skb);
|
|
|
|
spin_lock_irqsave(&p->ring_lock, flags);
|
|
tmdp = p->tmdhead + p->tmdnum;
|
|
tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
|
|
p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
|
|
|
|
#ifdef XMT_VIA_SKB
|
|
}
|
|
else {
|
|
spin_lock_irqsave(&p->ring_lock, flags);
|
|
|
|
tmdp = p->tmdhead + p->tmdnum;
|
|
tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
|
|
p->tmd_skb[p->tmdnum] = skb;
|
|
}
|
|
#endif
|
|
tmdp->blen = -len;
|
|
|
|
tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
|
|
writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
|
|
|
|
p->xmit_queued = 1;
|
|
p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
|
|
|
|
if(p->tmdnum != p->tmdlast)
|
|
netif_wake_queue(dev);
|
|
|
|
p->lock = 0;
|
|
|
|
spin_unlock_irqrestore(&p->ring_lock, flags);
|
|
}
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static void set_multicast_list(struct net_device *dev)
|
|
{
|
|
if(!ni65_lance_reinit(dev))
|
|
printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
#ifdef MODULE
|
|
static struct net_device *dev_ni65;
|
|
|
|
module_param_hw(irq, int, irq, 0);
|
|
module_param_hw(io, int, ioport, 0);
|
|
module_param_hw(dma, int, dma, 0);
|
|
MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
|
|
MODULE_PARM_DESC(io, "ni6510 I/O base address");
|
|
MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
|
|
|
|
int __init init_module(void)
|
|
{
|
|
dev_ni65 = ni65_probe(-1);
|
|
return PTR_ERR_OR_ZERO(dev_ni65);
|
|
}
|
|
|
|
void __exit cleanup_module(void)
|
|
{
|
|
unregister_netdev(dev_ni65);
|
|
cleanup_card(dev_ni65);
|
|
free_netdev(dev_ni65);
|
|
}
|
|
#endif /* MODULE */
|
|
|
|
MODULE_LICENSE("GPL");
|