90 lines
2.1 KiB
Plaintext
90 lines
2.1 KiB
Plaintext
/*
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* DTS file for SPEAr300 SoC
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*
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* Copyright 2012 Viresh Kumar <vireshk@kernel.org>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "spear3xx.dtsi"
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/ {
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0x60000000 0x60000000 0x50000000
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0xd0000000 0xd0000000 0x30000000>;
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pinmux@99000000 {
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compatible = "st,spear300-pinmux";
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reg = <0x99000000 0x1000>;
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};
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clcd@60000000 {
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compatible = "arm,pl110", "arm,primecell";
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reg = <0x60000000 0x1000>;
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interrupts = <30>;
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status = "disabled";
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};
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fsmc: flash@94000000 {
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compatible = "st,spear600-fsmc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x94000000 0x1000 /* FSMC Register */
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0x80000000 0x0010 /* NAND Base DATA */
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0x80020000 0x0010 /* NAND Base ADDR */
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0x80010000 0x0010>; /* NAND Base CMD */
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reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
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status = "disabled";
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};
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sdhci@70000000 {
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compatible = "st,sdhci-spear";
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reg = <0x70000000 0x100>;
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interrupts = <1>;
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status = "disabled";
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};
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shirq: interrupt-controller@0x50000000 {
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compatible = "st,spear300-shirq";
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reg = <0x50000000 0x1000>;
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interrupts = <28>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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apb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0xa0000000 0xa0000000 0x10000000
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0xd0000000 0xd0000000 0x30000000>;
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gpio1: gpio@a9000000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xa9000000 0x1000>;
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interrupts = <8>;
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interrupt-parent = <&shirq>;
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status = "disabled";
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};
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kbd@a0000000 {
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compatible = "st,spear300-kbd";
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reg = <0xa0000000 0x1000>;
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interrupts = <7>;
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interrupt-parent = <&shirq>;
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status = "disabled";
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};
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};
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};
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};
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