6db4831e98
Android 14
79 lines
1.8 KiB
C
79 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/clk.h>
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#include <linux/compiler.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/clkdev.h>
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#include <asm/clock.h>
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static struct clk master_clk = {
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.flags = CLK_ENABLE_ON_INIT,
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.rate = CONFIG_SH_PCLK_FREQ,
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};
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static struct clk peripheral_clk = {
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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static struct clk bus_clk = {
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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static struct clk cpu_clk = {
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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/*
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* The ordering of these clocks matters, do not change it.
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*/
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static struct clk *onchip_clocks[] = {
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&master_clk,
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&peripheral_clk,
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&bus_clk,
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&cpu_clk,
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};
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static struct clk_lookup lookups[] = {
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/* main clocks */
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CLKDEV_CON_ID("master_clk", &master_clk),
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CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
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CLKDEV_CON_ID("bus_clk", &bus_clk),
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CLKDEV_CON_ID("cpu_clk", &cpu_clk),
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};
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int __init __deprecated cpg_clk_init(void)
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{
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int i, ret = 0;
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for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
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struct clk *clk = onchip_clocks[i];
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arch_init_clk_ops(&clk->ops, i);
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if (clk->ops)
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ret |= clk_register(clk);
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}
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);
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clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);
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return ret;
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}
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/*
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* Placeholder for compatibility, until the lazy CPUs do this
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* on their own.
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*/
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int __init __weak arch_clk_init(void)
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{
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return cpg_clk_init();
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}
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