580 lines
18 KiB
C
580 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/crc8.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/mfd/mt6360.h>
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#include <linux/mfd/mt6360-private.h>
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enum {
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MT6360_PMIC_BUCK1 = 0,
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MT6360_PMIC_BUCK2,
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MT6360_PMIC_LDO6,
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MT6360_PMIC_LDO7,
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};
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enum {
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MT6360_LDO_LDO1 = 0,
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MT6360_LDO_LDO2,
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MT6360_LDO_LDO3,
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MT6360_LDO_LDO5,
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};
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#define MT6360_MAX_REGULATOR (4)
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/* PMIC register defininition */
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#define MT6360_PMIC_BUCK1_VOSEL (0x10)
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#define MT6360_PMIC_BUCK1_EN_CTRL2 (0x17)
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#define MT6360_PMIC_BUCK2_VOSEL (0x20)
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#define MT6360_PMIC_BUCK2_EN_CTRL2 (0x27)
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#define MT6360_PMIC_LDO7_EN_CTRL2 (0x31)
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#define MT6360_PMIC_LDO7_CTRL3 (0x35)
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#define MT6360_PMIC_LDO6_EN_CTRL2 (0x37)
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#define MT6360_PMIC_LDO6_CTRL3 (0x3B)
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#define MT6360_PMIC_REGMAX (0x3C)
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/* LDO register defininition */
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#define MT6360_LDO_LDO3_EN_CTRL2 (0x05)
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#define MT6360_LDO_LDO3_CTRL3 (0x09)
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#define MT6360_LDO_LDO5_EN_CTRL2 (0x0B)
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#define MT6360_LDO_LDO5_CTRL0 (0x0C)
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#define MT6360_LDO_LDO5_CTRL3 (0x0F)
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#define MT6360_LDO_LDO2_EN_CTRL2 (0x11)
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#define MT6360_LDO_LDO2_CTRL3 (0x15)
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#define MT6360_LDO_LDO1_EN_CTRL2 (0x17)
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#define MT6360_LDO_LDO1_CTRL3 (0x1B)
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#define MT6360_LDO_REGMAX (0x1C)
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#define MT6360_OPMODE_LP (2)
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#define MT6360_OPMODE_ULP (3)
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#define MT6360_OPMODE_NORMAL (0)
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struct mt6360_regulator_desc {
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const struct regulator_desc desc;
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unsigned int control_reg;
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unsigned int mode_set_mask;
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unsigned int mode_get_mask;
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};
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struct mt6360_regulator_devdata {
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int i2c_idx;
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const struct regmap_config *regmap_config;
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const struct mt6360_regulator_desc *reg_descs;
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int num_reg_descs;
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const struct mt6360_pmu_irq_desc *irq_descs;
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int num_irq_descs;
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};
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struct mt6360_regulator_info {
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struct i2c_client *i2c;
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struct device *dev;
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struct regulator_dev *rdev[MT6360_MAX_REGULATOR];
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struct regmap *regmap;
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unsigned int chip_rev;
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u8 crc8_table[CRC8_TABLE_SIZE];
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};
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#define MT6360_REGU_IRQH(_name, _rid, _event) \
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static irqreturn_t mt6360_pmu_##_name##_handler(int irq, void *data) \
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{ \
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struct mt6360_regulator_info *mri = data; \
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dev_warn(mri->dev, "%s\n", __func__); \
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regulator_notifier_call_chain(mri->rdev[_rid], _event, NULL); \
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return IRQ_HANDLED; \
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}
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#define MT6360_REGU_IRQ(_name) { #_name, mt6360_pmu_##_name##_handler }
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/* PMIC irqs */
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MT6360_REGU_IRQH(buck1_pgb_evt, MT6360_PMIC_BUCK1, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(buck1_oc_evt, MT6360_PMIC_BUCK1, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(buck1_ov_evt,
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MT6360_PMIC_BUCK1, REGULATOR_EVENT_REGULATION_OUT)
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MT6360_REGU_IRQH(buck1_uv_evt, MT6360_PMIC_BUCK1, REGULATOR_EVENT_UNDER_VOLTAGE)
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MT6360_REGU_IRQH(buck2_pgb_evt, MT6360_PMIC_BUCK2, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(buck2_oc_evt, MT6360_PMIC_BUCK2, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(buck2_ov_evt,
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MT6360_PMIC_BUCK2, REGULATOR_EVENT_REGULATION_OUT)
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MT6360_REGU_IRQH(buck2_uv_evt, MT6360_PMIC_BUCK2, REGULATOR_EVENT_UNDER_VOLTAGE)
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MT6360_REGU_IRQH(ldo6_oc_evt, MT6360_PMIC_LDO6, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo7_oc_evt, MT6360_PMIC_LDO7, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo6_pgb_evt, MT6360_PMIC_LDO6, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(ldo7_pgb_evt, MT6360_PMIC_LDO7, REGULATOR_EVENT_FAIL)
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/* LDO irqs */
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MT6360_REGU_IRQH(ldo1_oc_evt, MT6360_LDO_LDO1, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo2_oc_evt, MT6360_LDO_LDO2, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo3_oc_evt, MT6360_LDO_LDO3, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo5_oc_evt, MT6360_LDO_LDO5, REGULATOR_EVENT_OVER_CURRENT)
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MT6360_REGU_IRQH(ldo1_pgb_evt, MT6360_LDO_LDO1, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(ldo2_pgb_evt, MT6360_LDO_LDO2, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(ldo3_pgb_evt, MT6360_LDO_LDO3, REGULATOR_EVENT_FAIL)
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MT6360_REGU_IRQH(ldo5_pgb_evt, MT6360_LDO_LDO5, REGULATOR_EVENT_FAIL)
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static const struct mt6360_pmu_irq_desc mt6360_pmic_irq_descs[] = {
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MT6360_REGU_IRQ(buck1_pgb_evt),
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MT6360_REGU_IRQ(buck1_oc_evt),
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MT6360_REGU_IRQ(buck1_ov_evt),
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MT6360_REGU_IRQ(buck1_uv_evt),
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MT6360_REGU_IRQ(buck2_pgb_evt),
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MT6360_REGU_IRQ(buck2_oc_evt),
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MT6360_REGU_IRQ(buck2_ov_evt),
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MT6360_REGU_IRQ(buck2_uv_evt),
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MT6360_REGU_IRQ(ldo6_oc_evt),
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MT6360_REGU_IRQ(ldo7_oc_evt),
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MT6360_REGU_IRQ(ldo6_pgb_evt),
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MT6360_REGU_IRQ(ldo7_pgb_evt),
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};
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static const struct mt6360_pmu_irq_desc mt6360_ldo_irq_descs[] = {
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MT6360_REGU_IRQ(ldo1_oc_evt),
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MT6360_REGU_IRQ(ldo2_oc_evt),
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MT6360_REGU_IRQ(ldo3_oc_evt),
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MT6360_REGU_IRQ(ldo5_oc_evt),
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MT6360_REGU_IRQ(ldo1_pgb_evt),
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MT6360_REGU_IRQ(ldo2_pgb_evt),
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MT6360_REGU_IRQ(ldo3_pgb_evt),
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MT6360_REGU_IRQ(ldo5_pgb_evt),
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};
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static int mt6360_regulator_irq_register(struct platform_device *pdev,
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struct mt6360_regulator_devdata *devdata)
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{
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const struct mt6360_pmu_irq_desc *irq_desc;
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int i, irq, ret;
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for (i = 0; i < devdata->num_irq_descs; i++) {
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irq_desc = devdata->irq_descs + i;
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if (unlikely(!irq_desc->name))
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continue;
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irq = platform_get_irq_byname(pdev, irq_desc->name);
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if (irq < 0)
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continue;
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ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
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irq_desc->irq_handler,
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IRQF_TRIGGER_FALLING,
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irq_desc->name,
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platform_get_drvdata(pdev));
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if (ret < 0) {
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dev_err(&pdev->dev,
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"request %s irq fail\n", irq_desc->name);
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return ret;
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}
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}
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return 0;
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}
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static int mt6360_regulator_set_mode(
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struct regulator_dev *rdev, unsigned int mode)
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{
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const struct mt6360_regulator_desc *desc =
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(const struct mt6360_regulator_desc *)rdev->desc;
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int id = rdev_get_id(rdev);
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int shift = ffs(desc->mode_set_mask) - 1, ret;
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unsigned int val;
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dev_dbg(&rdev->dev, "%s, id = %d, mode = %d\n", __func__, id, mode);
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if (!mode)
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return -EINVAL;
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switch (1 << (ffs(mode) - 1)) {
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case REGULATOR_MODE_NORMAL:
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val = MT6360_OPMODE_NORMAL;
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break;
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case REGULATOR_MODE_STANDBY:
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val = MT6360_OPMODE_ULP;
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break;
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case REGULATOR_MODE_IDLE:
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val = MT6360_OPMODE_LP;
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break;
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default:
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return -ENOTSUPP;
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}
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ret = regmap_update_bits(rdev->regmap, desc->control_reg,
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desc->mode_set_mask, val << shift);
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if (ret < 0) {
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dev_err(&rdev->dev, "%s: fail (%d)\n", __func__, ret);
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return ret;
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}
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return 0;
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}
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static unsigned int mt6360_regulator_get_mode(struct regulator_dev *rdev)
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{
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const struct mt6360_regulator_desc *desc =
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(const struct mt6360_regulator_desc *)rdev->desc;
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int id = rdev_get_id(rdev);
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int shift = ffs(desc->mode_get_mask) - 1, ret;
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unsigned int val = 0;
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dev_dbg(&rdev->dev, "%s, id = %d\n", __func__, id);
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ret = regmap_read(rdev->regmap, desc->control_reg, &val);
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if (ret < 0)
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return ret;
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val &= desc->mode_get_mask;
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val >>= shift;
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switch (val) {
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case MT6360_OPMODE_LP:
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ret = REGULATOR_MODE_IDLE;
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break;
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case MT6360_OPMODE_ULP:
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ret = REGULATOR_MODE_STANDBY;
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break;
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case MT6360_OPMODE_NORMAL:
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ret = REGULATOR_MODE_NORMAL;
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break;
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default:
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ret = 0;
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}
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return ret;
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}
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static unsigned int mt6360_regulator_of_map_mode(unsigned int hw_mode)
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{
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unsigned int trans_mode = 0;
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switch (hw_mode) {
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case MT6360_OPMODE_NORMAL:
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trans_mode = REGULATOR_MODE_NORMAL;
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break;
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case MT6360_OPMODE_LP:
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trans_mode = REGULATOR_MODE_IDLE;
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break;
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case MT6360_OPMODE_ULP:
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trans_mode = REGULATOR_MODE_STANDBY;
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break;
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}
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return trans_mode;
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}
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static const struct regulator_ops mt6360_pmic_regulator_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_mode = mt6360_regulator_set_mode,
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.get_mode = mt6360_regulator_get_mode,
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};
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#define MT6360_PMIC_DESC(_name, _min, _stp, _cnt, _vreg, _vmask, \
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_enreg, _enmask, _ctrlreg, _modesmask, _modegmask) \
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{ \
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.desc = { \
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.name = #_name, \
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.id = MT6360_PMIC_##_name, \
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.owner = THIS_MODULE, \
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.ops = &mt6360_pmic_regulator_ops, \
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.of_match = of_match_ptr(#_name), \
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.min_uV = _min, \
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.uV_step = _stp, \
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.n_voltages = _cnt, \
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.type = REGULATOR_VOLTAGE, \
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.vsel_reg = _vreg, \
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.vsel_mask = _vmask, \
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.enable_reg = _enreg, \
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.enable_mask = _enmask, \
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.of_map_mode = mt6360_regulator_of_map_mode, \
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}, \
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.control_reg = _ctrlreg, \
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.mode_set_mask = _modesmask, \
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.mode_get_mask = _modegmask, \
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}
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static const struct mt6360_regulator_desc mt6360_pmic_descs[] = {
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MT6360_PMIC_DESC(BUCK1, 300000, 5000, 201, MT6360_PMIC_BUCK1_VOSEL,
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0xff, MT6360_PMIC_BUCK1_EN_CTRL2, 0x40,
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MT6360_PMIC_BUCK1_EN_CTRL2, 0x30, 0x03),
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MT6360_PMIC_DESC(BUCK2, 300000, 5000, 201, MT6360_PMIC_BUCK2_VOSEL,
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0xff, MT6360_PMIC_BUCK2_EN_CTRL2, 0x40,
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MT6360_PMIC_BUCK2_EN_CTRL2, 0x30, 0x03),
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MT6360_PMIC_DESC(LDO6, 500000, 10000, 161, MT6360_PMIC_LDO6_CTRL3,
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0xff, MT6360_PMIC_LDO6_EN_CTRL2, 0x40,
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MT6360_PMIC_LDO6_EN_CTRL2, 0x30, 0x03),
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MT6360_PMIC_DESC(LDO7, 500000, 10000, 161, MT6360_PMIC_LDO7_CTRL3,
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0xff, MT6360_PMIC_LDO7_EN_CTRL2, 0x40,
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MT6360_PMIC_LDO7_EN_CTRL2, 0x30, 0x03),
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};
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static const struct regulator_ops mt6360_ldo_regulator_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_mode = mt6360_regulator_set_mode,
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.get_mode = mt6360_regulator_get_mode,
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};
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static const struct regulator_linear_range ldo_volt_ranges1[] = {
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REGULATOR_LINEAR_RANGE(1200000, 0x00, 0x09, 10000),
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REGULATOR_LINEAR_RANGE(1300000, 0x0a, 0x10, 0),
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REGULATOR_LINEAR_RANGE(1310000, 0x11, 0x19, 10000),
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REGULATOR_LINEAR_RANGE(1400000, 0x1a, 0x1f, 0),
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REGULATOR_LINEAR_RANGE(1500000, 0x20, 0x29, 10000),
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REGULATOR_LINEAR_RANGE(1600000, 0x2a, 0x2f, 0),
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REGULATOR_LINEAR_RANGE(1700000, 0x30, 0x39, 10000),
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REGULATOR_LINEAR_RANGE(1800000, 0x3a, 0x40, 0),
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REGULATOR_LINEAR_RANGE(1810000, 0x41, 0x49, 10000),
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REGULATOR_LINEAR_RANGE(1900000, 0x4a, 0x4f, 0),
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REGULATOR_LINEAR_RANGE(2000000, 0x50, 0x59, 10000),
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REGULATOR_LINEAR_RANGE(2100000, 0x5a, 0x60, 0),
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REGULATOR_LINEAR_RANGE(2110000, 0x61, 0x69, 10000),
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REGULATOR_LINEAR_RANGE(2200000, 0x6a, 0x70, 0),
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REGULATOR_LINEAR_RANGE(2210000, 0x71, 0x79, 10000),
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REGULATOR_LINEAR_RANGE(2300000, 0x7a, 0x7f, 0),
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REGULATOR_LINEAR_RANGE(2700000, 0x80, 0x89, 10000),
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REGULATOR_LINEAR_RANGE(2800000, 0x8a, 0x90, 0),
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REGULATOR_LINEAR_RANGE(2810000, 0x91, 0x99, 10000),
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REGULATOR_LINEAR_RANGE(2900000, 0x9a, 0xa0, 0),
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REGULATOR_LINEAR_RANGE(2910000, 0xa1, 0xa9, 10000),
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REGULATOR_LINEAR_RANGE(3000000, 0xaa, 0xb0, 0),
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REGULATOR_LINEAR_RANGE(3010000, 0xb1, 0xb9, 10000),
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REGULATOR_LINEAR_RANGE(3100000, 0xba, 0xc0, 0),
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REGULATOR_LINEAR_RANGE(3110000, 0xc1, 0xc9, 10000),
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REGULATOR_LINEAR_RANGE(3200000, 0xca, 0xcf, 0),
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REGULATOR_LINEAR_RANGE(3300000, 0xd0, 0xd9, 10000),
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REGULATOR_LINEAR_RANGE(3400000, 0xda, 0xe0, 0),
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REGULATOR_LINEAR_RANGE(3410000, 0xe1, 0xe9, 10000),
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REGULATOR_LINEAR_RANGE(3500000, 0xea, 0xf0, 0),
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REGULATOR_LINEAR_RANGE(3510000, 0xf1, 0xf9, 10000),
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REGULATOR_LINEAR_RANGE(3600000, 0xfa, 0xff, 0),
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};
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static const struct regulator_linear_range ldo_volt_ranges2[] = {
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REGULATOR_LINEAR_RANGE(2700000, 0x00, 0x09, 10000),
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REGULATOR_LINEAR_RANGE(2800000, 0x0a, 0x10, 0),
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REGULATOR_LINEAR_RANGE(2810000, 0x11, 0x19, 10000),
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REGULATOR_LINEAR_RANGE(2900000, 0x1a, 0x20, 0),
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REGULATOR_LINEAR_RANGE(2910000, 0x21, 0x29, 10000),
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REGULATOR_LINEAR_RANGE(3000000, 0x2a, 0x30, 0),
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REGULATOR_LINEAR_RANGE(3010000, 0x31, 0x39, 10000),
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REGULATOR_LINEAR_RANGE(3100000, 0x3a, 0x40, 0),
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REGULATOR_LINEAR_RANGE(3110000, 0x41, 0x49, 10000),
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REGULATOR_LINEAR_RANGE(3200000, 0x4a, 0x4f, 0),
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REGULATOR_LINEAR_RANGE(3300000, 0x50, 0x59, 10000),
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REGULATOR_LINEAR_RANGE(3400000, 0x5a, 0x60, 0),
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REGULATOR_LINEAR_RANGE(3410000, 0x61, 0x69, 10000),
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REGULATOR_LINEAR_RANGE(3500000, 0x6a, 0x70, 0),
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REGULATOR_LINEAR_RANGE(3510000, 0x71, 0x79, 10000),
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REGULATOR_LINEAR_RANGE(3600000, 0x7a, 0x7f, 0),
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};
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#define MT6360_LDO_DESC(_name, _vranges, _vcnt, _vreg, _vmask, _enreg, \
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_enmask, _ctrlreg, _modesmask, _modegmask, _offon_delay) \
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{ \
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.desc = { \
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.name = #_name, \
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.id = MT6360_LDO_##_name, \
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.owner = THIS_MODULE, \
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.ops = &mt6360_ldo_regulator_ops, \
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.of_match = of_match_ptr(#_name), \
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.linear_ranges = _vranges, \
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.n_linear_ranges = ARRAY_SIZE(_vranges), \
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.n_voltages = _vcnt, \
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.type = REGULATOR_VOLTAGE, \
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.vsel_reg = _vreg, \
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.vsel_mask = _vmask, \
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.enable_reg = _enreg, \
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.enable_mask = _enmask, \
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.off_on_delay = _offon_delay, \
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.of_map_mode = mt6360_regulator_of_map_mode, \
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}, \
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.control_reg = _ctrlreg, \
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.mode_set_mask = _modesmask, \
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.mode_get_mask = _modegmask, \
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}
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static const struct mt6360_regulator_desc mt6360_ldo_descs[] = {
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MT6360_LDO_DESC(LDO1, ldo_volt_ranges1, 256, MT6360_LDO_LDO1_CTRL3,
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0xff, MT6360_LDO_LDO1_EN_CTRL2, 0x40,
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MT6360_LDO_LDO1_EN_CTRL2, 0x30, 0x03, 0),
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MT6360_LDO_DESC(LDO2, ldo_volt_ranges1, 256, MT6360_LDO_LDO2_CTRL3,
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0xff, MT6360_LDO_LDO2_EN_CTRL2, 0x40,
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MT6360_LDO_LDO2_EN_CTRL2, 0x30, 0x03, 0),
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MT6360_LDO_DESC(LDO3, ldo_volt_ranges1, 256, MT6360_LDO_LDO3_CTRL3,
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0xff, MT6360_LDO_LDO3_EN_CTRL2, 0x40,
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MT6360_LDO_LDO3_EN_CTRL2, 0x30, 0x03, 100),
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MT6360_LDO_DESC(LDO5, ldo_volt_ranges2, 128, MT6360_LDO_LDO5_CTRL3,
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0xff, MT6360_LDO_LDO5_EN_CTRL2, 0x40,
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MT6360_LDO_LDO5_EN_CTRL2, 0x30, 0x03, 100),
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};
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static int mt6360_regulator_reg_write(void *context,
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unsigned int reg, unsigned int val)
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{
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struct mt6360_regulator_info *mri = context;
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u8 chunk[5] = {0};
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/* chunk 0 ->i2c addr, 1 -> reg_addr, 2 -> reg_val 3-> crc8 */
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chunk[0] = (mri->i2c->addr & 0x7f) << 1;
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chunk[1] = reg & 0x3f;
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chunk[2] = (u8)val;
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chunk[3] = crc8(mri->crc8_table, chunk, 3, 0);
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/* also dummy one byte */
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return i2c_smbus_write_i2c_block_data(mri->i2c, chunk[1], 3, chunk + 2);
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}
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static int mt6360_regulator_reg_read(void *context,
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unsigned int reg, unsigned int *val)
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{
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struct mt6360_regulator_info *mri = context;
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u8 chunk[5] = {0};
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int ret;
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/* chunk 0->i2c addr, 1->reg_addr, 2->reg_val, 3->crc8, 4->crck */
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chunk[0] = ((mri->i2c->addr & 0x7f) << 1) + 1;
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chunk[1] = reg & 0x3f;
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ret = i2c_smbus_read_i2c_block_data(mri->i2c, chunk[1], 2, chunk + 2);
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if (ret < 0)
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return ret;
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chunk[4] = crc8(mri->crc8_table, chunk, 3, 0);
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if (chunk[3] != chunk[4])
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return -EINVAL;
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*val = chunk[2];
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return 0;
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}
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static const struct regmap_config mt6360_pmic_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.reg_read = mt6360_regulator_reg_read,
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.reg_write = mt6360_regulator_reg_write,
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.max_register = MT6360_PMIC_REGMAX,
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.use_single_rw = true,
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};
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static const struct regmap_config mt6360_ldo_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.reg_read = mt6360_regulator_reg_read,
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.reg_write = mt6360_regulator_reg_write,
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.max_register = MT6360_LDO_REGMAX,
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.use_single_rw = true,
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};
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static const struct mt6360_regulator_devdata mt6360_pmic_devdata = {
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.i2c_idx = MT6360_SLAVE_PMIC,
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.regmap_config = &mt6360_pmic_regmap_config,
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.reg_descs = mt6360_pmic_descs,
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.num_reg_descs = ARRAY_SIZE(mt6360_pmic_descs),
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.irq_descs = mt6360_pmic_irq_descs,
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.num_irq_descs = ARRAY_SIZE(mt6360_pmic_irq_descs),
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};
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static const struct mt6360_regulator_devdata mt6360_ldo_devdata = {
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.i2c_idx = MT6360_SLAVE_LDO,
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.regmap_config = &mt6360_ldo_regmap_config,
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.reg_descs = mt6360_ldo_descs,
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.num_reg_descs = ARRAY_SIZE(mt6360_ldo_descs),
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.irq_descs = mt6360_ldo_irq_descs,
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.num_irq_descs = ARRAY_SIZE(mt6360_ldo_irq_descs),
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};
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static const struct of_device_id __maybe_unused mt6360_regulator_of_id[] = {
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{
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.compatible = "mediatek,mt6360_pmic",
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.data = (void *)&mt6360_pmic_devdata,
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},
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{
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.compatible = "mediatek,mt6360_ldo",
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.data = (void *)&mt6360_ldo_devdata,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, mt6360_regulator_of_id);
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static int mt6360_regulator_probe(struct platform_device *pdev)
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{
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struct mt6360_pmu_info *pmu_info = dev_get_drvdata(pdev->dev.parent);
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struct mt6360_regulator_devdata *devdata;
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struct mt6360_regulator_info *mri;
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struct regulator_config config = {};
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const struct of_device_id *match;
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const struct platform_device_id *id;
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int i, ret;
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mri = devm_kzalloc(&pdev->dev, sizeof(*mri), GFP_KERNEL);
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if (!mri)
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return -ENOMEM;
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if (pdev->dev.of_node) {
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match = of_match_device(
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of_match_ptr(mt6360_regulator_of_id), &pdev->dev);
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if (!match) {
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dev_err(&pdev->dev, "no match device id\n");
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return -EINVAL;
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}
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devdata = (struct mt6360_regulator_devdata *)match->data;
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} else {
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id = platform_get_device_id(pdev);
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devdata = (struct mt6360_regulator_devdata *)id->driver_data;
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}
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mri->i2c = pmu_info->i2c[devdata->i2c_idx];
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mri->dev = &pdev->dev;
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mri->chip_rev = pmu_info->chip_rev;
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crc8_populate_msb(mri->crc8_table, 0x7);
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platform_set_drvdata(pdev, mri);
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/* regmap regiser */
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mri->regmap = devm_regmap_init(&(mri->i2c->dev),
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NULL, mri, devdata->regmap_config);
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if (IS_ERR(mri->regmap)) {
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dev_err(&pdev->dev, "Fail to register regmap\n");
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return PTR_ERR(mri->regmap);
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}
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/* regulator register */
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config.dev = &pdev->dev;
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config.driver_data = mri;
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config.regmap = mri->regmap;
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for (i = 0; i < devdata->num_reg_descs; i++) {
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mri->rdev[i] = devm_regulator_register(&pdev->dev,
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&(devdata->reg_descs[i].desc), &config);
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if (IS_ERR(mri->rdev[i])) {
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dev_err(&pdev->dev,
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"fail to register %d regulaotr\n", i);
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return PTR_ERR(mri->rdev[i]);
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}
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}
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ret = mt6360_regulator_irq_register(pdev, devdata);
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if (ret < 0) {
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dev_err(&pdev->dev, "Fail to register irqs\n");
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return ret;
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}
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dev_info(&pdev->dev, "Successfully probed\n");
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return 0;
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}
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static const struct platform_device_id mt6360_regulator_id[] = {
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{ "mt6360_pmic", (kernel_ulong_t)&mt6360_pmic_devdata },
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{ "mt6360_ldo", (kernel_ulong_t)&mt6360_ldo_devdata },
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{ },
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};
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MODULE_DEVICE_TABLE(platform, mt6360_regulator_id);
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static struct platform_driver mt6360_regulator_driver = {
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.driver = {
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.name = "mt6360_regulator",
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.of_match_table = of_match_ptr(mt6360_regulator_of_id),
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},
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.probe = mt6360_regulator_probe,
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.id_table = mt6360_regulator_id,
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};
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module_platform_driver(mt6360_regulator_driver);
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MODULE_AUTHOR("CY_Huang <cy_huang@richtek.com>");
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MODULE_DESCRIPTION("MT6360 Regulator Driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION("1.0.0");
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