6db4831e98
Android 14
233 lines
5.3 KiB
C
233 lines
5.3 KiB
C
/*
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* da9052 declarations for DA9052 PMICs.
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*
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* Copyright(c) 2011 Dialog Semiconductor Ltd.
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*
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* Author: David Dajun Chen <dchen@diasemi.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __MFD_DA9052_DA9052_H
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#define __MFD_DA9052_DA9052_H
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#include <linux/interrupt.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/completion.h>
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#include <linux/list.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/da9052/reg.h>
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/* Common - HWMON Channel Definations */
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#define DA9052_ADC_VDDOUT 0
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#define DA9052_ADC_ICH 1
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#define DA9052_ADC_TBAT 2
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#define DA9052_ADC_VBAT 3
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#define DA9052_ADC_IN4 4
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#define DA9052_ADC_IN5 5
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#define DA9052_ADC_IN6 6
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#define DA9052_ADC_TSI 7
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#define DA9052_ADC_TJUNC 8
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#define DA9052_ADC_VBBAT 9
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/* TSI channel has its own 4 channel mux */
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#define DA9052_ADC_TSI_XP 70
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#define DA9052_ADC_TSI_XN 71
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#define DA9052_ADC_TSI_YP 72
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#define DA9052_ADC_TSI_YN 73
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#define DA9052_IRQ_DCIN 0
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#define DA9052_IRQ_VBUS 1
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#define DA9052_IRQ_DCINREM 2
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#define DA9052_IRQ_VBUSREM 3
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#define DA9052_IRQ_VDDLOW 4
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#define DA9052_IRQ_ALARM 5
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#define DA9052_IRQ_SEQRDY 6
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#define DA9052_IRQ_COMP1V2 7
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#define DA9052_IRQ_NONKEY 8
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#define DA9052_IRQ_IDFLOAT 9
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#define DA9052_IRQ_IDGND 10
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#define DA9052_IRQ_CHGEND 11
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#define DA9052_IRQ_TBAT 12
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#define DA9052_IRQ_ADC_EOM 13
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#define DA9052_IRQ_PENDOWN 14
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#define DA9052_IRQ_TSIREADY 15
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#define DA9052_IRQ_GPI0 16
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#define DA9052_IRQ_GPI1 17
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#define DA9052_IRQ_GPI2 18
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#define DA9052_IRQ_GPI3 19
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#define DA9052_IRQ_GPI4 20
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#define DA9052_IRQ_GPI5 21
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#define DA9052_IRQ_GPI6 22
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#define DA9052_IRQ_GPI7 23
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#define DA9052_IRQ_GPI8 24
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#define DA9052_IRQ_GPI9 25
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#define DA9052_IRQ_GPI10 26
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#define DA9052_IRQ_GPI11 27
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#define DA9052_IRQ_GPI12 28
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#define DA9052_IRQ_GPI13 29
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#define DA9052_IRQ_GPI14 30
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#define DA9052_IRQ_GPI15 31
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enum da9052_chip_id {
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DA9052,
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DA9053_AA,
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DA9053_BA,
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DA9053_BB,
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DA9053_BC,
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};
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struct da9052_pdata;
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struct da9052 {
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struct device *dev;
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struct regmap *regmap;
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struct mutex auxadc_lock;
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struct completion done;
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int irq_base;
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struct regmap_irq_chip_data *irq_data;
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u8 chip_id;
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int chip_irq;
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/* SOC I/O transfer related fixes for DA9052/53 */
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int (*fix_io) (struct da9052 *da9052, unsigned char reg);
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};
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/* ADC API */
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int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
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int da9052_adc_read_temp(struct da9052 *da9052);
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/* Device I/O API */
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static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
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{
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int val, ret;
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ret = regmap_read(da9052->regmap, reg, &val);
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if (ret < 0)
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return ret;
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if (da9052->fix_io) {
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ret = da9052->fix_io(da9052, reg);
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if (ret < 0)
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return ret;
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}
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return val;
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}
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static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
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unsigned char val)
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{
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int ret;
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ret = regmap_write(da9052->regmap, reg, val);
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if (ret < 0)
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return ret;
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if (da9052->fix_io) {
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ret = da9052->fix_io(da9052, reg);
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if (ret < 0)
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return ret;
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}
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return ret;
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}
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static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
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unsigned reg_cnt, unsigned char *val)
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{
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int ret;
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unsigned int tmp;
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int i;
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for (i = 0; i < reg_cnt; i++) {
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ret = regmap_read(da9052->regmap, reg + i, &tmp);
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val[i] = (unsigned char)tmp;
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if (ret < 0)
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return ret;
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}
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if (da9052->fix_io) {
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ret = da9052->fix_io(da9052, reg);
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if (ret < 0)
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return ret;
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}
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return ret;
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}
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static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
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unsigned reg_cnt, unsigned char *val)
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{
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int ret = 0;
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int i;
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for (i = 0; i < reg_cnt; i++) {
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ret = regmap_write(da9052->regmap, reg + i, val[i]);
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if (ret < 0)
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return ret;
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}
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if (da9052->fix_io) {
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ret = da9052->fix_io(da9052, reg);
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if (ret < 0)
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return ret;
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}
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return ret;
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}
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static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
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unsigned char bit_mask,
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unsigned char reg_val)
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{
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int ret;
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ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
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if (ret < 0)
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return ret;
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if (da9052->fix_io) {
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ret = da9052->fix_io(da9052, reg);
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if (ret < 0)
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return ret;
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}
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return ret;
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}
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int da9052_device_init(struct da9052 *da9052, u8 chip_id);
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void da9052_device_exit(struct da9052 *da9052);
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extern const struct regmap_config da9052_regmap_config;
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int da9052_irq_init(struct da9052 *da9052);
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int da9052_irq_exit(struct da9052 *da9052);
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int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
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irq_handler_t handler, void *data);
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void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
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int da9052_enable_irq(struct da9052 *da9052, int irq);
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int da9052_disable_irq(struct da9052 *da9052, int irq);
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int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
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#endif /* __MFD_DA9052_DA9052_H */
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