188 lines
6 KiB
C
188 lines
6 KiB
C
/*
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* Freescale MXS Low Resolution Analog-to-Digital Converter driver
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*
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* Copyright (c) 2012 DENX Software Engineering, GmbH.
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* Copyright (c) 2016 Ksenija Stanojevic <ksenija.stanojevic@gmail.com>
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*
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* Author: Marek Vasut <marex@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MFD_MXS_LRADC_H
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#define __MFD_MXS_LRADC_H
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/stmp_device.h>
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#define LRADC_MAX_DELAY_CHANS 4
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#define LRADC_MAX_MAPPED_CHANS 8
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#define LRADC_MAX_TOTAL_CHANS 16
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#define LRADC_DELAY_TIMER_HZ 2000
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#define LRADC_CTRL0 0x00
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# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)
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# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
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# define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)
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# define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)
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# define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)
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# define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)
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# define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)
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# define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)
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# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)
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# define LRADC_CTRL0_MX23_YM BIT(19)
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# define LRADC_CTRL0_MX23_XM BIT(18)
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# define LRADC_CTRL0_MX23_YP BIT(17)
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# define LRADC_CTRL0_MX23_XP BIT(16)
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# define LRADC_CTRL0_MX28_PLATE_MASK \
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(LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
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LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
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LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
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LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
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# define LRADC_CTRL0_MX23_PLATE_MASK \
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(LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
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LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
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LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
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#define LRADC_CTRL1 0x10
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#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)
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#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
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#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
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#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
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#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
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#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)
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#define LRADC_CTRL1_LRADC_IRQ(n) BIT(n)
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#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
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#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
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#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
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#define LRADC_CTRL2 0x20
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#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
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#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)
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#define LRADC_STATUS 0x40
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#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)
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#define LRADC_CH(n) (0x50 + (0x10 * (n)))
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#define LRADC_CH_ACCUMULATE BIT(29)
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#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
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#define LRADC_CH_NUM_SAMPLES_OFFSET 24
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#define LRADC_CH_NUM_SAMPLES(x) \
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((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
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#define LRADC_CH_VALUE_MASK 0x3ffff
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#define LRADC_CH_VALUE_OFFSET 0
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#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
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#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xffUL << 24)
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#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
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#define LRADC_DELAY_TRIGGER(x) \
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(((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
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LRADC_DELAY_TRIGGER_LRADCS_MASK)
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#define LRADC_DELAY_KICK BIT(20)
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#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
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#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
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#define LRADC_DELAY_TRIGGER_DELAYS(x) \
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(((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
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LRADC_DELAY_TRIGGER_DELAYS_MASK)
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#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
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#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
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#define LRADC_DELAY_LOOP(x) \
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(((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
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LRADC_DELAY_LOOP_COUNT_MASK)
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#define LRADC_DELAY_DELAY_MASK 0x7ff
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#define LRADC_DELAY_DELAY_OFFSET 0
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#define LRADC_DELAY_DELAY(x) \
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(((x) << LRADC_DELAY_DELAY_OFFSET) & \
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LRADC_DELAY_DELAY_MASK)
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#define LRADC_CTRL4 0x140
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#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
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#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
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#define LRADC_CTRL4_LRADCSELECT(n, x) \
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(((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
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LRADC_CTRL4_LRADCSELECT_MASK(n))
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#define LRADC_RESOLUTION 12
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#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
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#define BUFFER_VCHANS_LIMITED 0x3f
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#define BUFFER_VCHANS_ALL 0xff
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/*
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* Certain LRADC channels are shared between touchscreen
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* and/or touch-buttons and generic LRADC block. Therefore when using
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* either of these, these channels are not available for the regular
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* sampling. The shared channels are as follows:
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*
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* CH0 -- Touch button #0
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* CH1 -- Touch button #1
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* CH2 -- Touch screen XPUL
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* CH3 -- Touch screen YPLL
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* CH4 -- Touch screen XNUL
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* CH5 -- Touch screen YNLR
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* CH6 -- Touch screen WIPER (5-wire only)
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*
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* The bit fields below represents which parts of the LRADC block are
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* switched into special mode of operation. These channels can not
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* be sampled as regular LRADC channels. The driver will refuse any
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* attempt to sample these channels.
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*/
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#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))
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#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
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#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
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enum mxs_lradc_id {
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IMX23_LRADC,
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IMX28_LRADC,
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};
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enum mxs_lradc_ts_wires {
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MXS_LRADC_TOUCHSCREEN_NONE = 0,
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MXS_LRADC_TOUCHSCREEN_4WIRE,
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MXS_LRADC_TOUCHSCREEN_5WIRE,
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};
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/**
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* struct mxs_lradc
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* @soc: soc type (IMX23 or IMX28)
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* @clk: 2 kHz clock for delay units
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* @buffer_vchans: channels that can be used during buffered capture
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* @touchscreen_wire: touchscreen type (4-wire or 5-wire)
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* @use_touchbutton: button state (on or off)
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*/
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struct mxs_lradc {
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enum mxs_lradc_id soc;
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struct clk *clk;
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u8 buffer_vchans;
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enum mxs_lradc_ts_wires touchscreen_wire;
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bool use_touchbutton;
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};
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static inline u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
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{
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switch (lradc->soc) {
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case IMX23_LRADC:
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return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
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case IMX28_LRADC:
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return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
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default:
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return 0;
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}
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}
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#endif /* __MXS_LRADC_H */
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